Lines Matching refs:default_val
689 u8 misc_num, u32 default_val, u32 mask)
694 default_val &= mask;
695 if (boot_val != default_val) {
697 misc_num, boot_val, default_val);
710 u32 default_val;
712 default_val = PLLCX_MISC0_DEFAULT_VALUE & (~PLLCX_MISC0_RESET);
713 _pll_misc_chk_default(clk_base, params, 0, default_val,
716 default_val = PLLCX_MISC1_DEFAULT_VALUE & (~PLLCX_MISC1_IDDQ);
717 _pll_misc_chk_default(clk_base, params, 1, default_val,
720 default_val = PLLCX_MISC2_DEFAULT_VALUE;
721 _pll_misc_chk_default(clk_base, params, 2, default_val,
724 default_val = PLLCX_MISC3_DEFAULT_VALUE;
725 _pll_misc_chk_default(clk_base, params, 3, default_val,
888 u32 default_val;
905 default_val = misc0_val;
906 _pll_misc_chk_default(clk_base, plldss->params, 0, default_val,
916 default_val = misc1_val;
918 default_val, PLLDSS_MISC1_CFG_WRITE_MASK);
919 default_val = misc2_val;
921 default_val, PLLDSS_MISC2_CTRL1_WRITE_MASK);
922 default_val = misc3_val;
924 default_val, PLLDSS_MISC3_CTRL2_WRITE_MASK);
926 default_val = misc1_val;
928 default_val, PLLDSS_MISC1_CFG_WRITE_MASK &
1094 u32 default_val;
1096 default_val = PLLX_MISC0_DEFAULT_VALUE;
1098 _pll_misc_chk_default(clk_base, pll->params, 0, default_val,
1101 default_val = PLLX_MISC1_DEFAULT_VALUE;
1102 _pll_misc_chk_default(clk_base, pll->params, 1, default_val,
1106 default_val = PLLX_MISC2_DEFAULT_VALUE;
1108 default_val, PLLX_MISC2_EN_DYNRAMP);
1110 default_val = PLLX_MISC3_DEFAULT_VALUE & (~PLLX_MISC3_IDDQ);
1111 _pll_misc_chk_default(clk_base, pll->params, 3, default_val,
1114 default_val = PLLX_MISC4_DEFAULT_VALUE;
1115 _pll_misc_chk_default(clk_base, pll->params, 4, default_val,
1118 default_val = PLLX_MISC5_DEFAULT_VALUE;
1119 _pll_misc_chk_default(clk_base, pll->params, 5, default_val,