Lines Matching defs:pllu
1308 static void tegra210_pllu_set_defaults(struct tegra_clk_pll_params *pllu)
1310 u32 val = readl_relaxed(clk_base + pllu->base_reg);
1312 pllu->defaults_set = true;
1320 pllu_check_defaults(pllu, false);
1321 if (!pllu->defaults_set)
1325 val = readl_relaxed(clk_base + pllu->ext_misc_reg[0]);
1328 writel_relaxed(val, clk_base + pllu->ext_misc_reg[0]);
1330 val = readl_relaxed(clk_base + pllu->ext_misc_reg[1]);
1333 writel_relaxed(val, clk_base + pllu->ext_misc_reg[1]);
1341 clk_base + pllu->ext_misc_reg[0]);
1343 clk_base + pllu->ext_misc_reg[1]);
2844 struct tegra_clk_pll pllu;
2859 pllu.params = &pll_u_vco_params;
2860 reg = readl_relaxed(clk_base + pllu.params->ext_misc_reg[0]);
2861 reg &= ~BIT(pllu.params->iddq_bit_idx);
2862 writel_relaxed(reg, clk_base + pllu.params->ext_misc_reg[0]);
2881 ret = tegra210_wait_for_mask(&pllu, PLLU_BASE, PLL_BASE_LOCK);
2896 /* skip initialization when pllu is in hw controlled mode */