Lines Matching defs:input_rate
1060 unsigned long input_rate;
1064 input_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
1066 input_rate = 38400000;
1068 input_rate /= tegra_pll_get_fixed_mdiv(hw, input_rate);
1070 switch (input_rate) {
1087 __func__, input_rate);
1413 cfg->input_rate / cfg->m * cfg->n /
1429 unsigned long rate, unsigned long input_rate)
1450 cfg->m = tegra_pll_get_fixed_mdiv(hw, input_rate);
1459 cf = input_rate / cfg->m;
1463 cfg->output_rate = input_rate;
1481 cfg->input_rate = input_rate;
2848 for (fentry = pll_u_freq_table; fentry->input_rate; fentry++) {
2849 if (fentry->input_rate == pll_ref_freq)
2853 if (!fentry->input_rate) {