Lines Matching refs:rate
41 static int cclk_super_set_rate(struct clk_hw *hw, unsigned long rate,
44 return tegra_clk_super_ops.set_rate(hw, rate, parent_rate);
63 long rate = req->rate;
74 if (rate <= pllp_rate) {
76 rate = pllp_rate;
78 rate = tegra_clk_super_ops.round_rate(hw, rate,
83 req->rate = rate;
85 rate = clk_hw_round_rate(pllx_hw, rate);
86 req->best_parent_rate = rate;
88 req->rate = rate;
91 if (WARN_ON_ONCE(rate <= 0))
200 * changes its rate. PLLP is a safe parent for CPU on all Tegra SoCs.