clk-sdmmc-mux.c - OpenGrok cross reference for /kernel/linux/linux-5.10/drivers/clk/tegra/clk-sdmmc-mux.c

Lines Matching defs:sdmmc_mux
43 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
50 	val = readl_relaxed(sdmmc_mux->reg);
69 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
73 	val = readl_relaxed(sdmmc_mux->reg);
82 	writel(val, sdmmc_mux->reg);
90 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
95 	val = readl_relaxed(sdmmc_mux->reg);
110 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
120 	div = div_frac_get(req->rate, output_rate, 8, 1, sdmmc_mux->div_flags);
124 	if (sdmmc_mux->div_flags & TEGRA_DIVIDER_ROUND_UP)
136 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
142 	div = div_frac_get(rate, parent_rate, 8, 1, sdmmc_mux->div_flags);
146 	if (sdmmc_mux->lock)
147 		spin_lock_irqsave(sdmmc_mux->lock, flags);
157 	writel(val, sdmmc_mux->reg);
158 	fence_udelay(2, sdmmc_mux->reg);
160 	if (sdmmc_mux->lock)
161 		spin_unlock_irqrestore(sdmmc_mux->lock, flags);
168 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
169 	const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
170 	struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
179 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
180 	const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
181 	struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
190 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
191 	const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
192 	struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
199 	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
200 	const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
201 	struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
241 	struct tegra_sdmmc_mux *sdmmc_mux;
253 	sdmmc_mux = kzalloc(sizeof(*sdmmc_mux), GFP_KERNEL);
254 	if (!sdmmc_mux)
258 	sdmmc_mux->hw.init = &init;
259 	sdmmc_mux->reg = clk_base + offset;
260 	sdmmc_mux->lock = lock;
261 	sdmmc_mux->gate.clk_base = clk_base;
262 	sdmmc_mux->gate.regs = bank;
263 	sdmmc_mux->gate.enable_refcnt = periph_clk_enb_refcnt;
264 	sdmmc_mux->gate.clk_num = clk_num;
265 	sdmmc_mux->gate.flags = TEGRA_PERIPH_ON_APB;
266 	sdmmc_mux->div_flags = div_flags;
267 	sdmmc_mux->gate_ops = &tegra_clk_periph_gate_ops;
269 	clk = clk_register(NULL, &sdmmc_mux->hw);
271 		kfree(sdmmc_mux);
275 	sdmmc_mux->gate.hw.clk = clk;