Lines Matching refs:pll_writel

237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
238 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p)
239 #define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p)
241 #define pll_writel_sdm_din(val, p) pll_writel(val, p->params->sdm_din_reg, p)
242 #define pll_writel_sdm_ctrl(val, p) pll_writel(val, p->params->sdm_ctrl_reg, p)
364 pll_writel(val, pll->params->iddq_reg, pll);
371 pll_writel(val, pll->params->reset_reg, pll);
409 pll_writel(val, pll->params->reset_reg, pll);
415 pll_writel(val, pll->params->iddq_reg, pll);
426 pll_writel(val, pll->params->ssc_ctrl_reg, pll);
436 pll_writel(val, pll->params->ssc_ctrl_reg, pll);
1630 pll_writel(val, pll->params->aux_reg, pll);
1644 pll_writel(val, PLLE_SS_CTRL, pll);
1666 pll_writel(val, PLLE_SS_CTRL, pll);
1668 pll_writel(val, PLLE_SS_CTRL, pll);
1671 pll_writel(val, PLLE_SS_CTRL, pll);
1682 pll_writel(val, pll->params->aux_reg, pll);
1685 pll_writel(val, pll->params->aux_reg, pll);
1692 pll_writel(val, XUSBIO_PLL_CFG0, pll);
1695 pll_writel(val, XUSBIO_PLL_CFG0, pll);
1702 pll_writel(val, SATA_PLL_CFG0, pll);
1708 pll_writel(val, SATA_PLL_CFG0, pll);
1860 pll_writel(val_aux, pll->params->aux_reg, pll);
2254 pll_writel(PLLCX_MISC1_DEFAULT, pll_params->ext_misc_reg[0], pll);
2255 pll_writel(PLLCX_MISC2_DEFAULT, pll_params->ext_misc_reg[1], pll);
2256 pll_writel(PLLCX_MISC3_DEFAULT, pll_params->ext_misc_reg[2], pll);
2377 pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll);
2378 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll);
2379 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll);
2484 pll_writel(val, PLLE_SS_CTRL, pll);
2509 pll_writel(val, PLLE_SS_CTRL, pll);
2511 pll_writel(val, PLLE_SS_CTRL, pll);
2514 pll_writel(val, PLLE_SS_CTRL, pll);
2524 pll_writel(val, pll->params->aux_reg, pll);
2527 pll_writel(val, pll->params->aux_reg, pll);
2556 pll_writel(val, pll->params->aux_reg, pll);