Lines Matching defs:periph

16 	struct tegra_clk_periph *periph = to_clk_periph(hw);
17 const struct clk_ops *mux_ops = periph->mux_ops;
18 struct clk_hw *mux_hw = &periph->mux.hw;
27 struct tegra_clk_periph *periph = to_clk_periph(hw);
28 const struct clk_ops *mux_ops = periph->mux_ops;
29 struct clk_hw *mux_hw = &periph->mux.hw;
39 struct tegra_clk_periph *periph = to_clk_periph(hw);
40 const struct clk_ops *div_ops = periph->div_ops;
41 struct clk_hw *div_hw = &periph->divider.hw;
51 struct tegra_clk_periph *periph = to_clk_periph(hw);
52 const struct clk_ops *div_ops = periph->div_ops;
53 struct clk_hw *div_hw = &periph->divider.hw;
63 struct tegra_clk_periph *periph = to_clk_periph(hw);
64 const struct clk_ops *div_ops = periph->div_ops;
65 struct clk_hw *div_hw = &periph->divider.hw;
74 struct tegra_clk_periph *periph = to_clk_periph(hw);
75 const struct clk_ops *gate_ops = periph->gate_ops;
76 struct clk_hw *gate_hw = &periph->gate.hw;
85 struct tegra_clk_periph *periph = to_clk_periph(hw);
86 const struct clk_ops *gate_ops = periph->gate_ops;
87 struct clk_hw *gate_hw = &periph->gate.hw;
96 struct tegra_clk_periph *periph = to_clk_periph(hw);
97 const struct clk_ops *gate_ops = periph->gate_ops;
98 struct clk_hw *gate_hw = &periph->gate.hw;
105 struct tegra_clk_periph *periph = to_clk_periph(hw);
106 const struct clk_ops *gate_ops = periph->gate_ops;
107 struct clk_hw *gate_hw = &periph->gate.hw;
114 struct tegra_clk_periph *periph = to_clk_periph(hw);
115 const struct clk_ops *div_ops = periph->div_ops;
116 struct clk_hw *div_hw = &periph->divider.hw;
123 if (!(periph->gate.flags & TEGRA_PERIPH_NO_DIV))
163 struct tegra_clk_periph *periph,
170 bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
172 if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) {
175 } else if (periph->gate.flags & TEGRA_PERIPH_NO_GATE)
185 bank = get_reg_bank(periph->gate.clk_num);
190 periph->hw.init = &init;
191 periph->magic = TEGRA_CLK_PERIPH_MAGIC;
192 periph->mux.reg = clk_base + offset;
193 periph->divider.reg = div ? (clk_base + offset) : NULL;
194 periph->gate.clk_base = clk_base;
195 periph->gate.regs = bank;
196 periph->gate.enable_refcnt = periph_clk_enb_refcnt;
198 clk = clk_register(NULL, &periph->hw);
202 periph->mux.hw.clk = clk;
203 periph->divider.hw.clk = div ? clk : NULL;
204 periph->gate.hw.clk = clk;
211 struct tegra_clk_periph *periph, void __iomem *clk_base,
215 periph, clk_base, offset, flags);
220 struct tegra_clk_periph *periph, void __iomem *clk_base,
223 periph->gate.flags |= TEGRA_PERIPH_NO_DIV;
225 periph, clk_base, offset, CLK_SET_RATE_PARENT);
232 init->num_parents, &init->periph,