Lines Matching defs:offs
330 static inline u32 dfll_readl(struct tegra_dfll *td, u32 offs)
332 return __raw_readl(td->base + offs);
335 static inline void dfll_writel(struct tegra_dfll *td, u32 val, u32 offs)
337 WARN_ON(offs >= DFLL_I2C_CFG);
338 __raw_writel(val, td->base + offs);
348 static inline u32 dfll_i2c_readl(struct tegra_dfll *td, u32 offs)
350 return __raw_readl(td->i2c_base + offs);
353 static inline void dfll_i2c_writel(struct tegra_dfll *td, u32 val, u32 offs)
355 __raw_writel(val, td->i2c_base + offs);
1325 u32 val, offs;
1329 for (offs = 0; offs <= DFLL_MONITOR_DATA; offs += 4) {
1330 if (offs == DFLL_OUTPUT_CFG)
1331 val = dfll_i2c_readl(td, offs);
1333 val = dfll_readl(td, offs);
1334 seq_printf(s, "[0x%02x] = 0x%08x\n", offs, val);
1338 for (offs = DFLL_I2C_CFG; offs <= DFLL_I2C_STS; offs += 4)
1339 seq_printf(s, "[0x%02x] = 0x%08x\n", offs,
1340 dfll_i2c_readl(td, offs));
1341 for (offs = DFLL_INTR_STS; offs <= DFLL_INTR_EN; offs += 4)
1342 seq_printf(s, "[0x%02x] = 0x%08x\n", offs,
1343 dfll_i2c_readl(td, offs));
1347 offs = DFLL_I2C_CLK_DIVISOR;
1348 seq_printf(s, "[0x%02x] = 0x%08x\n", offs,
1349 __raw_readl(td->i2c_controller_base + offs));
1352 for (offs = 0; offs < 4 * MAX_DFLL_VOLTAGES; offs += 4)
1353 seq_printf(s, "[0x%02x] = 0x%08x\n", offs,
1354 __raw_readl(td->lut_base + offs));