Lines Matching refs:reg
19 u32 reg;23 reg = readl(ccu->base + map->reg);24 writel(reg & ~map->bit, ccu->base + map->reg);37 u32 reg;41 reg = readl(ccu->base + map->reg);42 writel(reg | map->bit, ccu->base + map->reg);69 return !(map->bit & readl(ccu->base + map->reg));