Lines Matching refs:rate
13 static void ccu_mp_find_best(unsigned long parent, unsigned long rate,
25 if (tmp_rate > rate)
28 if ((rate - tmp_rate) < (rate - best_rate)) {
42 unsigned long rate,
56 * unsigned long in rate * m * p below
59 maxdiv = min(ULONG_MAX / rate, maxdiv);
68 if (rate * div == parent_rate_saved) {
71 * rate can be divided from parent clock without
72 * needing to change parent rate, so return the
76 return rate;
79 parent_rate = clk_hw_round_rate(hw, rate * div);
82 if (now <= rate && now > best_rate) {
86 if (now == rate)
87 return rate;
98 unsigned long rate,
106 rate *= cmp->fixed_post_div;
112 ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p);
113 rate = *parent_rate / p / m;
115 rate = ccu_mp_find_best_with_parent_adj(hw, parent_rate, rate,
120 rate /= cmp->fixed_post_div;
122 return rate;
150 unsigned long rate;
169 rate = (parent_rate >> p) / m;
171 rate /= cmp->fixed_post_div;
173 return rate;
185 static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate,
201 /* Adjust target rate according to post-dividers */
203 rate = rate * cmp->fixed_post_div;
205 ccu_mp_find_best(parent_rate, rate, max_m, max_p, &m, &p);
258 * mode is active, the clock output rate is halved. This new class
269 unsigned long rate = ccu_mp_recalc_rate(hw, parent_rate);
274 return rate / 2;
275 return rate;
285 /* adjust the requested clock rate */
287 req->rate *= 2;
294 /* re-adjust the requested clock rate back */
296 req->rate /= 2;
304 static int ccu_mp_mmc_set_rate(struct clk_hw *hw, unsigned long rate,
311 rate *= 2;
313 return ccu_mp_set_rate(hw, rate, parent_rate);