Lines Matching refs:NULL
120 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
121 clk_register_clkdev(clk, "osc_32k_clk", NULL);
123 clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000);
124 clk_register_clkdev(clk, "osc_30m_clk", NULL);
127 clk = clk_register_gate(NULL, "rtc_spear", "osc_32k_clk", 0,
129 clk_register_clkdev(clk, NULL, "rtc-spear");
132 clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,
134 clk_register_clkdev(clk, "pll3_clk", NULL);
136 clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk",
138 &_lock, &clk1, NULL);
139 clk_register_clkdev(clk, "vco1_clk", NULL);
140 clk_register_clkdev(clk1, "pll1_clk", NULL);
142 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "osc_30m_clk",
144 &_lock, &clk1, NULL);
145 clk_register_clkdev(clk, "vco2_clk", NULL);
146 clk_register_clkdev(clk1, "pll2_clk", NULL);
148 clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_30m_clk", 0, 1,
150 clk_register_clkdev(clk, NULL, "fc880000.wdt");
153 clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",
155 clk_register_clkdev(clk, "cpu_clk", NULL);
157 clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",
160 clk_register_clkdev(clk, "ahb_clk", NULL);
163 UART_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
165 clk_register_clkdev(clk, "uart_syn_clk", NULL);
166 clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
168 clk = clk_register_mux(NULL, "uart_mclk", uart_parents,
172 clk_register_clkdev(clk, "uart_mclk", NULL);
174 clk = clk_register_gate(NULL, "uart0", "uart_mclk", 0, PERIP1_CLK_ENB,
176 clk_register_clkdev(clk, NULL, "d0000000.serial");
178 clk = clk_register_gate(NULL, "uart1", "uart_mclk", 0, PERIP1_CLK_ENB,
180 clk_register_clkdev(clk, NULL, "d0080000.serial");
183 0, FIRDA_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
185 clk_register_clkdev(clk, "firda_syn_clk", NULL);
186 clk_register_clkdev(clk1, "firda_syn_gclk", NULL);
188 clk = clk_register_mux(NULL, "firda_mclk", firda_parents,
192 clk_register_clkdev(clk, "firda_mclk", NULL);
194 clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0,
196 clk_register_clkdev(clk, NULL, "firda");
199 0, CLCD_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
201 clk_register_clkdev(clk, "clcd_syn_clk", NULL);
202 clk_register_clkdev(clk1, "clcd_syn_gclk", NULL);
204 clk = clk_register_mux(NULL, "clcd_mclk", clcd_parents,
208 clk_register_clkdev(clk, "clcd_mclk", NULL);
210 clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0,
212 clk_register_clkdev(clk, NULL, "clcd");
217 clk_register_clkdev(clk, "gpt0_1_syn_clk", NULL);
219 clk = clk_register_mux(NULL, "gpt0_mclk", gpt0_1_parents,
222 clk_register_clkdev(clk, NULL, "gpt0");
224 clk = clk_register_mux(NULL, "gpt1_mclk", gpt0_1_parents,
227 clk_register_clkdev(clk, "gpt1_mclk", NULL);
229 clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
231 clk_register_clkdev(clk, NULL, "gpt1");
235 clk_register_clkdev(clk, "gpt2_syn_clk", NULL);
237 clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,
240 clk_register_clkdev(clk, "gpt2_mclk", NULL);
242 clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
244 clk_register_clkdev(clk, NULL, "gpt2");
248 clk_register_clkdev(clk, "gpt3_syn_clk", NULL);
250 clk = clk_register_mux(NULL, "gpt3_mclk", gpt3_parents,
253 clk_register_clkdev(clk, "gpt3_mclk", NULL);
255 clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,
257 clk_register_clkdev(clk, NULL, "gpt3");
260 clk = clk_register_gate(NULL, "usbh0_clk", "pll3_clk", 0,
262 clk_register_clkdev(clk, NULL, "e1800000.ehci");
263 clk_register_clkdev(clk, NULL, "e1900000.ohci");
265 clk = clk_register_gate(NULL, "usbh1_clk", "pll3_clk", 0,
267 clk_register_clkdev(clk, NULL, "e2000000.ehci");
268 clk_register_clkdev(clk, NULL, "e2100000.ohci");
270 clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
272 clk_register_clkdev(clk, NULL, "designware_udc");
275 clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,
277 clk_register_clkdev(clk, "ahbmult2_clk", NULL);
279 clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,
282 clk_register_clkdev(clk, "ddr_clk", NULL);
284 clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",
287 clk_register_clkdev(clk, "apb_clk", NULL);
289 clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
291 clk_register_clkdev(clk, NULL, "fc400000.dma");
293 clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
295 clk_register_clkdev(clk, NULL, "d1800000.flash");
297 clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
299 clk_register_clkdev(clk, NULL, "e0800000.ethernet");
301 clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
303 clk_register_clkdev(clk, NULL, "d0200000.i2c");
305 clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
307 clk_register_clkdev(clk, NULL, "jpeg");
309 clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
311 clk_register_clkdev(clk, NULL, "fc000000.flash");
314 clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,
316 clk_register_clkdev(clk, NULL, "d820b000.adc");
318 clk = clk_register_fixed_factor(NULL, "gpio0_clk", "apb_clk", 0, 1, 1);
319 clk_register_clkdev(clk, NULL, "f0100000.gpio");
321 clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, PERIP1_CLK_ENB,
323 clk_register_clkdev(clk, NULL, "fc980000.gpio");
325 clk = clk_register_gate(NULL, "gpio2_clk", "apb_clk", 0, PERIP1_CLK_ENB,
327 clk_register_clkdev(clk, NULL, "d8100000.gpio");
329 clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,
331 clk_register_clkdev(clk, NULL, "ssp-pl022.0");
333 clk = clk_register_gate(NULL, "ssp1_clk", "apb_clk", 0, PERIP1_CLK_ENB,
335 clk_register_clkdev(clk, NULL, "ssp-pl022.1");
337 clk = clk_register_gate(NULL, "ssp2_clk", "apb_clk", 0, PERIP1_CLK_ENB,
339 clk_register_clkdev(clk, NULL, "ssp-pl022.2");