Lines Matching defs:vco
12 #define pr_fmt(fmt) "clk-vco-pll: " fmt
26 * vco = (2 * M[15:8] * Fin)/N
29 * vco = (2 * M[15:0] * Fin)/(256 * N)
33 * vco and pll are very closely bound to each other, "vco needs to program:
37 * clk_register_vco_pll() registers instances of both vco & pll.
39 * set_rate to vco. A single rate table exists for both the clocks, which
97 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) {
100 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index,
131 if (pll->vco->lock)
132 spin_lock_irqsave(pll->vco->lock, flags);
134 p = readl_relaxed(pll->vco->cfg_reg);
136 if (pll->vco->lock)
137 spin_unlock_irqrestore(pll->vco->lock, flags);
148 struct pll_rate_tbl *rtbl = pll->vco->rtbl;
154 if (pll->vco->lock)
155 spin_lock_irqsave(pll->vco->lock, flags);
157 val = readl_relaxed(pll->vco->cfg_reg);
160 writel_relaxed(val, pll->vco->cfg_reg);
162 if (pll->vco->lock)
163 spin_unlock_irqrestore(pll->vco->lock, flags);
177 struct clk_vco *vco = to_clk_vco(hw);
179 return pll_calc_rate(vco->rtbl, prate, index, NULL);
185 struct clk_vco *vco = to_clk_vco(hw);
189 vco->rtbl_cnt, &unused);
195 struct clk_vco *vco = to_clk_vco(hw);
199 if (vco->lock)
200 spin_lock_irqsave(vco->lock, flags);
202 mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK;
204 val = readl_relaxed(vco->cfg_reg);
206 if (vco->lock)
207 spin_unlock_irqrestore(vco->lock, flags);
229 /* Configures new clock rate of vco */
233 struct clk_vco *vco = to_clk_vco(hw);
234 struct pll_rate_tbl *rtbl = vco->rtbl;
238 clk_round_rate_index(hw, drate, prate, vco_calc_rate, vco->rtbl_cnt,
241 if (vco->lock)
242 spin_lock_irqsave(vco->lock, flags);
244 val = readl_relaxed(vco->mode_reg);
247 writel_relaxed(val, vco->mode_reg);
249 val = readl_relaxed(vco->cfg_reg);
261 writel_relaxed(val, vco->cfg_reg);
263 if (vco->lock)
264 spin_unlock_irqrestore(vco->lock, flags);
282 struct clk_vco *vco;
294 vco = kzalloc(sizeof(*vco), GFP_KERNEL);
295 if (!vco)
303 vco->mode_reg = mode_reg;
304 vco->cfg_reg = cfg_reg;
305 vco->rtbl = rtbl;
306 vco->rtbl_cnt = rtbl_cnt;
307 vco->lock = lock;
308 vco->hw.init = &vco_init;
310 pll->vco = vco;
338 vco_clk = clk_register(NULL, &vco->hw);
354 kfree(vco);
356 pr_err("Failed to register vco pll clock\n");