Lines Matching refs:socfpgaclk
93 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
96 if (socfpgaclk->fixed_div)
97 div = socfpgaclk->fixed_div;
98 else if (socfpgaclk->div_reg) {
99 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
100 val &= GENMASK(socfpgaclk->width - 1, 0);
102 if ((uintptr_t) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
113 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
119 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) {
127 switch (socfpgaclk->clk_phase[i]) {