Lines Matching defs:node
94 static void __init __socfpga_gate_init(struct device_node *node,
103 const char *clk_name = node->name;
112 rc = of_property_read_u32_array(node, "clk-gate", clk_gate, 2);
124 rc = of_property_read_u32(node, "fixed-divider", &fixed_div);
130 rc = of_property_read_u32_array(node, "div-reg", div_reg, 3);
139 rc = of_property_read_u32_array(node, "clk-phase", clk_phase, 2);
154 of_property_read_string(node, "clock-output-names", &clk_name);
160 init.num_parents = of_clk_parent_fill(node, parent_name, SOCFPGA_MAX_PARENTS);
169 rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
174 void __init socfpga_a10_gate_init(struct device_node *node)
176 __socfpga_gate_init(node, &gateclk_ops);