Lines Matching refs:rate
95 static long pll_clk_round_rate(struct clk_hw *hw, unsigned long rate,
105 rate = rate - rate % MHZ;
107 nf = rate / MHZ;
126 static int pll_clk_set_rate(struct clk_hw *hw, unsigned long rate,
137 nf = rate / MHZ;
138 if (unlikely((rate % MHZ) || nf > BIT(13) || nf < 1))
162 static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
172 return pll_clk_round_rate(parent_clk, rate, &pll_parent_rate);
180 * So return the parent pll rate.
353 static long dmn_clk_round_rate(struct clk_hw *hw, unsigned long rate,
362 ratio = fin / rate;
375 static int dmn_clk_set_rate(struct clk_hw *hw, unsigned long rate,
385 ratio = fin / rate;
390 WARN_ON(fin % rate);
407 static int cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
413 if (rate == clk_get_rate(clk_pll1.hw.clk)) {
418 if (rate == clk_get_rate(clk_pll2.hw.clk)) {
423 if (rate == clk_get_rate(clk_pll3.hw.clk)) {
430 /* switch to tmp pll before setting parent clock's rate */
436 ret2 = clk_set_rate(clk_pll1.hw.clk, rate);