Lines Matching refs:pdiv
109 u32 pll_con, mdiv, pdiv, sdiv;
114 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK;
118 do_div(fvco, (pdiv + 2) << sdiv);
142 u32 pll_con, mdiv, pdiv, sdiv;
147 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK;
151 do_div(fvco, pdiv << sdiv);
179 u32 mdiv, pdiv, sdiv, pll_con;
184 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
188 do_div(fvco, (pdiv << sdiv));
201 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
231 writel_relaxed(rate->pdiv * PLL35XX_LOCK_FACTOR,
239 (rate->pdiv << PLL35XX_PDIV_SHIFT) |
286 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
293 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
298 do_div(fvco, (pdiv << sdiv));
313 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv ||
344 writel_relaxed(rate->pdiv * PLL36XX_LOCK_FACTOR, pll->lock_reg);
351 (rate->pdiv << PLL36XX_PDIV_SHIFT) |
404 u32 mdiv, pdiv, sdiv, pll_con;
409 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
416 do_div(fvco, (pdiv << sdiv));
430 return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
467 (rate->pdiv << PLL45XX_PDIV_SHIFT) |
478 writel_relaxed(rate->pdiv * PLL4502_LOCK_FACTOR, pll->lock_reg);
481 writel_relaxed(rate->pdiv * PLL4508_LOCK_FACTOR, pll->lock_reg);
551 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
558 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
566 do_div(fvco, (pdiv << sdiv));
581 return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
614 lock = rate->pdiv * PLL46XX_LOCK_FACTOR;
633 (rate->pdiv << PLL46XX_PDIV_SHIFT) |
694 u32 mdiv, pdiv, sdiv, pll_con;
700 pdiv = (pll_con >> PLL6552_PDIV_SHIFT_2416) & PLL6552_PDIV_MASK;
703 pdiv = (pll_con >> PLL6552_PDIV_SHIFT) & PLL6552_PDIV_MASK;
708 do_div(fvco, (pdiv << sdiv));
734 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
740 pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK;
745 do_div(fvco, (pdiv << sdiv));
772 u32 pll_con, mdiv, pdiv, sdiv;
777 pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
781 do_div(fvco, (pdiv + 2) << sdiv);
790 u32 pll_con, mdiv, pdiv, sdiv;
795 pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
799 do_div(fvco, (pdiv + 2) << sdiv);
826 (rate->pdiv << PLLS3C2410_PDIV_SHIFT) |
976 u32 mdiv, pdiv, sdiv, pll_con;
981 pdiv = (pll_con >> PLL2550XX_P_SHIFT) & PLL2550XX_P_MASK;
985 do_div(fvco, (pdiv << sdiv));
990 static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con)
997 return mdiv != old_mdiv || pdiv != old_pdiv;
1017 if (!(samsung_pll2550xx_mp_change(rate->mdiv, rate->pdiv, tmp))) {
1027 writel_relaxed(rate->pdiv * PLL2550XX_LOCK_FACTOR, pll->lock_reg);
1034 (rate->pdiv << PLL2550XX_P_SHIFT) |
1082 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
1087 pdiv = (pll_con0 >> PLL2650X_P_SHIFT) & PLL2650X_P_MASK;
1094 do_div(fout, (pdiv << sdiv));
1119 writel_relaxed(rate->pdiv * PLL2650X_LOCK_FACTOR, pll->lock_reg);
1126 (rate->pdiv << PLL2650X_P_SHIFT) |
1177 u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;
1184 pdiv = (pll_con0 >> PLL2650XX_PDIV_SHIFT) & PLL2650XX_PDIV_MASK;
1189 do_div(fvco, (pdiv << sdiv));
1217 pll_con0 |= rate->pdiv << PLL2650XX_PDIV_SHIFT;
1227 writel_relaxed(PLL2650XX_LOCK_FACTOR * rate->pdiv, pll->lock_reg);