Lines Matching refs:con1
439 u32 con0, con1;
451 con1 = readl_relaxed(pll->con_reg + 0x4);
453 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {
471 con1 = readl_relaxed(pll->con_reg + 0x4);
472 con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT);
473 con1 |= (rate->afc << PLL45XX_AFC_SHIFT);
488 writel_relaxed(con1, pll->con_reg + 0x4);
590 u32 con0, con1, lock;
602 con1 = readl_relaxed(pll->con_reg + 0x4);
604 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {
637 con1 = readl_relaxed(pll->con_reg + 0x4);
638 con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) |
641 con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) |
648 writel_relaxed(con1, pll->con_reg + 0x4);
1105 u32 con0, con1;
1116 con1 = readl_relaxed(pll->con_reg + 4);
1131 con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT);
1132 con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT);
1133 writel_relaxed(con1, pll->con_reg + 4);