Lines Matching refs:DIV
590 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
591 DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
592 DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus",
595 DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
596 DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
597 DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus",
600 DIV(0, "div_core", "mout_core", DIV_CPU0, 0, 3),
601 DIV(0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
602 DIV(0, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
603 DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3),
604 DIV(0, "div_atb", "mout_core", DIV_CPU0, 16, 3),
605 DIV(0, "div_pclk_dbg", "div_atb", DIV_CPU0, 20, 3),
606 DIV(0, "div_core2", "div_core", DIV_CPU0, 28, 3),
607 DIV(0, "div_copy", "mout_hpm", DIV_CPU1, 0, 3),
608 DIV(0, "div_hpm", "div_copy", DIV_CPU1, 4, 3),
609 DIV(0, "div_clkout_cpu", "mout_clkout_cpu", CLKOUT_CMU_CPU, 8, 6),
611 DIV(0, "div_fimc0", "mout_fimc0", DIV_CAM, 0, 4),
612 DIV(0, "div_fimc1", "mout_fimc1", DIV_CAM, 4, 4),
613 DIV(0, "div_fimc2", "mout_fimc2", DIV_CAM, 8, 4),
614 DIV(0, "div_fimc3", "mout_fimc3", DIV_CAM, 12, 4),
615 DIV(0, "div_cam0", "mout_cam0", DIV_CAM, 16, 4),
616 DIV(0, "div_cam1", "mout_cam1", DIV_CAM, 20, 4),
617 DIV(0, "div_csis0", "mout_csis0", DIV_CAM, 24, 4),
618 DIV(0, "div_csis1", "mout_csis1", DIV_CAM, 28, 4),
619 DIV(CLK_SCLK_MFC, "sclk_mfc", "mout_mfc", DIV_MFC, 0, 4),
620 DIV(CLK_SCLK_G3D, "sclk_g3d", "mout_g3d", DIV_G3D, 0, 4),
621 DIV(0, "div_fimd0", "mout_fimd0", DIV_LCD0, 0, 4),
622 DIV(0, "div_mipi0", "mout_mipi0", DIV_LCD0, 16, 4),
623 DIV(0, "div_audio0", "mout_audio0", DIV_MAUDIO, 0, 4),
624 DIV(CLK_SCLK_PCM0, "sclk_pcm0", "sclk_audio0", DIV_MAUDIO, 4, 8),
625 DIV(0, "div_mmc0", "mout_mmc0", DIV_FSYS1, 0, 4),
626 DIV(0, "div_mmc1", "mout_mmc1", DIV_FSYS1, 16, 4),
627 DIV(0, "div_mmc2", "mout_mmc2", DIV_FSYS2, 0, 4),
628 DIV(0, "div_mmc3", "mout_mmc3", DIV_FSYS2, 16, 4),
629 DIV(CLK_SCLK_PIXEL, "sclk_pixel", "sclk_vpll", DIV_TV, 0, 4),
630 DIV(CLK_ACLK100, "aclk100", "mout_aclk100", DIV_TOP, 4, 4),
631 DIV(CLK_ACLK160, "aclk160", "mout_aclk160", DIV_TOP, 8, 3),
632 DIV(CLK_ACLK133, "aclk133", "mout_aclk133", DIV_TOP, 12, 3),
633 DIV(0, "div_onenand", "mout_onenand1", DIV_TOP, 16, 3),
634 DIV(CLK_SCLK_SLIMBUS, "sclk_slimbus", "sclk_epll", DIV_PERIL3, 4, 4),
635 DIV(CLK_SCLK_PCM1, "sclk_pcm1", "sclk_audio1", DIV_PERIL4, 4, 8),
636 DIV(CLK_SCLK_PCM2, "sclk_pcm2", "sclk_audio2", DIV_PERIL4, 20, 8),
637 DIV(CLK_SCLK_I2S1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
638 DIV(CLK_SCLK_I2S2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
639 DIV(0, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
642 DIV(0, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
643 DIV(0, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
644 DIV(0, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),
645 DIV(0, "div_uart3", "mout_uart3", DIV_PERIL0, 12, 4),
646 DIV(0, "div_uart4", "mout_uart4", DIV_PERIL0, 16, 4),
647 DIV(0, "div_spi0", "mout_spi0", DIV_PERIL1, 0, 4),
648 DIV(0, "div_spi_pre0", "div_spi0", DIV_PERIL1, 8, 8),
649 DIV(0, "div_spi1", "mout_spi1", DIV_PERIL1, 16, 4),
650 DIV(0, "div_spi_pre1", "div_spi1", DIV_PERIL1, 24, 8),
651 DIV(0, "div_spi2", "mout_spi2", DIV_PERIL2, 0, 4),
652 DIV(0, "div_spi_pre2", "div_spi2", DIV_PERIL2, 8, 8),
653 DIV(0, "div_audio1", "mout_audio1", DIV_PERIL4, 0, 4),
654 DIV(0, "div_audio2", "mout_audio2", DIV_PERIL4, 16, 4),
655 DIV(CLK_SCLK_APLL, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3),
666 DIV(0, "div_clkout_top", "mout_clkout_top", CLKOUT_CMU_TOP, 8, 6),
668 DIV(CLK_DIV_ACP, "div_acp", "mout_dmc_bus", DIV_DMC0, 0, 3),
669 DIV(0, "div_acp_pclk", "div_acp", DIV_DMC0, 4, 3),
670 DIV(0, "div_dphy", "mout_dphy", DIV_DMC0, 8, 3),
671 DIV(CLK_DIV_DMC, "div_dmc", "mout_dmc_bus", DIV_DMC0, 12, 3),
672 DIV(0, "div_dmcd", "div_dmc", DIV_DMC0, 16, 3),
673 DIV(0, "div_dmcp", "div_dmcd", DIV_DMC0, 20, 3),
674 DIV(0, "div_pwi", "mout_pwi", DIV_DMC1, 8, 4),
675 DIV(0, "div_clkout_dmc", "mout_clkout_dmc", CLKOUT_CMU_DMC, 8, 6),
680 DIV(CLK_ACLK200, "aclk200", "mout_aclk200", DIV_TOP, 0, 3),
681 DIV(CLK_SCLK_FIMG2D, "sclk_fimg2d", "mout_g2d", DIV_IMAGE, 0, 4),
682 DIV(0, "div_fimd1", "mout_fimd1", E4210_DIV_LCD1, 0, 4),
683 DIV(0, "div_mipi1", "mout_mipi1", E4210_DIV_LCD1, 16, 4),
684 DIV(0, "div_sata", "mout_sata", DIV_FSYS0, 20, 4),
691 DIV(0, "div_mdnie0", "mout_mdnie0", DIV_LCD0, 4, 4),
692 DIV(0, "div_mdnie_pwm0", "mout_mdnie_pwm0", DIV_LCD0, 8, 4),
693 DIV(0, "div_mdnie_pwm_pre0", "div_mdnie_pwm0", DIV_LCD0, 12, 4),
694 DIV(0, "div_mipihsi", "mout_mipihsi", DIV_FSYS0, 20, 4),
695 DIV(0, "div_jpeg", "mout_jpeg", E4X12_DIV_CAM1, 0, 4),
696 DIV(CLK_DIV_ACLK200, "div_aclk200", "mout_aclk200", DIV_TOP, 0, 3),
697 DIV(0, "div_aclk266_gps", "mout_aclk266_gps", DIV_TOP, 20, 3),
698 DIV(CLK_DIV_ACLK400_MCUISP, "div_aclk400_mcuisp", "mout_aclk400_mcuisp",
700 DIV(0, "div_pwm_isp", "mout_pwm_isp", E4X12_DIV_ISP, 0, 4),
701 DIV(0, "div_spi0_isp", "mout_spi0_isp", E4X12_DIV_ISP, 4, 4),
702 DIV(0, "div_spi0_isp_pre", "div_spi0_isp", E4X12_DIV_ISP, 8, 8),
703 DIV(0, "div_spi1_isp", "mout_spi1_isp", E4X12_DIV_ISP, 16, 4),
704 DIV(0, "div_spi1_isp_pre", "div_spi1_isp", E4X12_DIV_ISP, 20, 8),
705 DIV(0, "div_uart_isp", "mout_uart_isp", E4X12_DIV_ISP, 28, 4),
706 DIV(CLK_SCLK_FIMG2D, "sclk_fimg2d", "mout_g2d", DIV_DMC1, 0, 4),
707 DIV(CLK_DIV_C2C, "div_c2c", "mout_c2c", DIV_DMC1, 4, 3),
708 DIV(0, "div_c2c_aclk", "div_c2c", DIV_DMC1, 12, 3),