Lines Matching refs:list
417 struct rockchip_pll_clock *list,
423 for (idx = 0; idx < nr_pll; idx++, list++) {
424 clk = rockchip_clk_register_pll(ctx, list->type, list->name,
425 list->parent_names, list->num_parents,
426 list->con_offset, grf_lock_offset,
427 list->lock_shift, list->mode_offset,
428 list->mode_shift, list->rate_table,
429 list->flags, list->pll_flags);
432 list->name);
436 rockchip_clk_add_lookup(ctx, clk, list->id);
442 struct rockchip_clk_branch *list,
449 for (idx = 0; idx < nr_clk; idx++, list++) {
450 flags = list->flags;
453 switch (list->branch_type) {
455 clk = clk_register_mux(NULL, list->name,
456 list->parent_names, list->num_parents,
457 flags, ctx->reg_base + list->muxdiv_offset,
458 list->mux_shift, list->mux_width,
459 list->mux_flags, &ctx->lock);
462 clk = rockchip_clk_register_muxgrf(list->name,
463 list->parent_names, list->num_parents,
464 flags, ctx->grf, list->muxdiv_offset,
465 list->mux_shift, list->mux_width,
466 list->mux_flags);
469 if (list->div_table)
471 list->name, list->parent_names[0],
473 ctx->reg_base + list->muxdiv_offset,
474 list->div_shift, list->div_width,
475 list->div_flags, list->div_table,
478 clk = clk_register_divider(NULL, list->name,
479 list->parent_names[0], flags,
480 ctx->reg_base + list->muxdiv_offset,
481 list->div_shift, list->div_width,
482 list->div_flags, &ctx->lock);
485 clk = rockchip_clk_register_frac_branch(ctx, list->name,
486 list->parent_names, list->num_parents,
487 ctx->reg_base, list->muxdiv_offset,
488 list->div_flags,
489 list->gate_offset, list->gate_shift,
490 list->gate_flags, flags, list->child,
494 clk = rockchip_clk_register_halfdiv(list->name,
495 list->parent_names, list->num_parents,
496 ctx->reg_base, list->muxdiv_offset,
497 list->mux_shift, list->mux_width,
498 list->mux_flags, list->div_shift,
499 list->div_width, list->div_flags,
500 list->gate_offset, list->gate_shift,
501 list->gate_flags, flags, &ctx->lock);
506 clk = clk_register_gate(NULL, list->name,
507 list->parent_names[0], flags,
508 ctx->reg_base + list->gate_offset,
509 list->gate_shift, list->gate_flags, &ctx->lock);
512 clk = rockchip_clk_register_branch(list->name,
513 list->parent_names, list->num_parents,
514 ctx->reg_base, list->muxdiv_offset,
515 list->mux_shift,
516 list->mux_width, list->mux_flags,
517 list->div_offset, list->div_shift, list->div_width,
518 list->div_flags, list->div_table,
519 list->gate_offset, list->gate_shift,
520 list->gate_flags, flags, &ctx->lock);
524 list->name,
525 list->parent_names, list->num_parents,
526 ctx->reg_base + list->muxdiv_offset,
527 list->div_shift
532 list->name, list->parent_names,
533 list->num_parents,
534 ctx->reg_base + list->muxdiv_offset,
535 list->div_shift, list->div_flags, &ctx->lock);
539 list->name, list->parent_names,
540 list->num_parents, ctx->reg_base,
541 list->div_shift, list->div_width,
542 list->gate_offset, list->gate_shift,
543 list->gate_flags, flags, &ctx->lock);
547 list->name, list->flags,
548 list->parent_names, list->num_parents,
549 list->muxdiv_offset, list->mux_shift,
550 list->mux_width, list->div_shift,
551 list->div_width, list->div_flags,
559 __func__, list->branch_type);
565 __func__, list->name, PTR_ERR(clk));
569 rockchip_clk_add_lookup(ctx, clk, list->id);