clk-pll.c - OpenGrok cross reference for /kernel/linux/linux-5.10/drivers/clk/rockchip/clk-pll.c

Lines Matching defs:pllcon
122 	u32 pllcon;
130 					 pllcon,
131 					 pllcon & RK3036_PLLCON1_LOCK_STATUS,
142 	u32 pllcon;
144 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(0));
145 	rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT)
147 	rate->postdiv1 = ((pllcon >> RK3036_PLLCON0_POSTDIV1_SHIFT)
150 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(1));
151 	rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT)
153 	rate->postdiv2 = ((pllcon >> RK3036_PLLCON1_POSTDIV2_SHIFT)
155 	rate->dsmpd = ((pllcon >> RK3036_PLLCON1_DSMPD_SHIFT)
158 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));
159 	rate->frac = ((pllcon >> RK3036_PLLCON2_FRAC_SHIFT)
195 	u32 pllcon;
229 	pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));
230 	pllcon &= ~(RK3036_PLLCON2_FRAC_MASK << RK3036_PLLCON2_FRAC_SHIFT);
231 	pllcon |= rate->frac << RK3036_PLLCON2_FRAC_SHIFT;
232 	writel_relaxed(pllcon, pll->reg_base + RK3036_PLLCON(2));
291 	u32 pllcon = readl(pll->reg_base + RK3036_PLLCON(1));
293 	return !(pllcon & RK3036_PLLCON1_PWRDOWN);
383 	u32 pllcon;
385 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));
386 	rate->nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT)
388 	rate->no = ((pllcon >> RK3066_PLLCON0_OD_SHIFT)
391 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));
392 	rate->nf = ((pllcon >> RK3066_PLLCON1_NF_SHIFT)
395 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));
396 	rate->nb = ((pllcon >> RK3066_PLLCON2_NB_SHIFT)
406 	u32 pllcon;
408 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));
409 	if (pllcon & RK3066_PLLCON3_BYPASS) {
526 	u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));
528 	return !(pllcon & RK3066_PLLCON3_PWRDOWN);
602 	u32 pllcon;
610 					 pllcon,
611 					 pllcon & RK3399_PLLCON2_LOCK_STATUS,
622 	u32 pllcon;
624 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(0));
625 	rate->fbdiv = ((pllcon >> RK3399_PLLCON0_FBDIV_SHIFT)
628 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(1));
629 	rate->refdiv = ((pllcon >> RK3399_PLLCON1_REFDIV_SHIFT)
631 	rate->postdiv1 = ((pllcon >> RK3399_PLLCON1_POSTDIV1_SHIFT)
633 	rate->postdiv2 = ((pllcon >> RK3399_PLLCON1_POSTDIV2_SHIFT)
636 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));
637 	rate->frac = ((pllcon >> RK3399_PLLCON2_FRAC_SHIFT)
640 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(3));
641 	rate->dsmpd = ((pllcon >> RK3399_PLLCON3_DSMPD_SHIFT)
677 	u32 pllcon;
709 	pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));
710 	pllcon &= ~(RK3399_PLLCON2_FRAC_MASK << RK3399_PLLCON2_FRAC_SHIFT);
711 	pllcon |= rate->frac << RK3399_PLLCON2_FRAC_SHIFT;
712 	writel_relaxed(pllcon, pll->reg_base + RK3399_PLLCON(2));
775 	u32 pllcon = readl(pll->reg_base + RK3399_PLLCON(3));
777 	return !(pllcon & RK3399_PLLCON3_PWRDOWN);