clk-cpu.c - OpenGrok cross reference for /kernel/linux/linux-5.10/drivers/clk/rockchip/clk-cpu.c

Lines Matching refs:reg_data
49  * @reg_data:	cpu-specific register settings
63 	const struct rockchip_cpuclk_reg_data	*reg_data;
90 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
91 	u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg);
93 	clksel0 >>= reg_data->div_core_shift;
94 	clksel0 &= reg_data->div_core_mask;
123 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
149 		if (alt_div > reg_data->div_core_mask) {
151 				__func__, alt_div, reg_data->div_core_mask);
152 			alt_div = reg_data->div_core_mask;
165 		writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask,
166 					      reg_data->div_core_shift) |
167 		       HIWORD_UPDATE(reg_data->mux_core_alt,
168 				     reg_data->mux_core_mask,
169 				     reg_data->mux_core_shift),
170 		       cpuclk->reg_base + reg_data->core_reg);
173 		writel(HIWORD_UPDATE(reg_data->mux_core_alt,
174 				     reg_data->mux_core_mask,
175 				     reg_data->mux_core_shift),
176 		       cpuclk->reg_base + reg_data->core_reg);
186 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
209 	writel(HIWORD_UPDATE(0, reg_data->div_core_mask,
210 				reg_data->div_core_shift) |
211 	       HIWORD_UPDATE(reg_data->mux_core_main,
212 				reg_data->mux_core_mask,
213 				reg_data->mux_core_shift),
214 	       cpuclk->reg_base + reg_data->core_reg);
248 			const struct rockchip_cpuclk_reg_data *reg_data,
267 	init.parent_names = &parent_names[reg_data->mux_core_main];
281 	cpuclk->reg_data = reg_data;
285 	cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]);
288 		       __func__, reg_data->mux_core_alt);
300 	clk = __clk_lookup(parent_names[reg_data->mux_core_main]);
303 		       __func__, reg_data->mux_core_main,
304 		       parent_names[reg_data->mux_core_main]);