Lines Matching refs:value
195 u32 value;
202 value = readb(priv->base + priv->control_regs[reg]);
204 value &= ~bitmask;
206 value |= bitmask;
207 writeb(value, priv->base + priv->control_regs[reg]);
213 value = readl(priv->base + priv->control_regs[reg]);
215 value &= ~bitmask;
217 value |= bitmask;
218 writel(value, priv->base + priv->control_regs[reg]);
255 u32 value;
258 value = readb(priv->base + priv->control_regs[clock->index / 32]);
260 value = readl(priv->base + priv->status_regs[clock->index / 32]);
262 return !(value & BIT(clock->index % 32));
361 /* Multiply with the DIV6 register value */