Lines Matching refs:val
62 u32 val;
72 ret = regmap_read(sc->regmap, reg, &val);
79 return !!(val & GDSC_POWER_UP_COMPLETE);
81 return !!(val & GDSC_POWER_DOWN_COMPLETE);
87 return !!(val & PWR_ON_MASK);
89 return !(val & PWR_ON_MASK);
97 u32 val = en ? HW_CONTROL_MASK : 0;
99 return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);
121 u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK;
129 ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val);
339 u32 mask, val;
357 val = sc->en_rest_wait_val << EN_REST_WAIT_SHIFT |
361 ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val);
390 SW_COLLAPSE_MASK, val);