Lines Matching refs:sc
59 static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status)
65 if (sc->flags & POLL_CFG_GDSCR)
66 reg = sc->gdscr + CFG_GDSCR_OFFSET;
67 else if (sc->gds_hw_ctrl)
68 reg = sc->gds_hw_ctrl;
70 reg = sc->gdscr;
72 ret = regmap_read(sc->regmap, reg, &val);
76 if (sc->flags & POLL_CFG_GDSCR) {
95 static int gdsc_hwctrl(struct gdsc *sc, bool en)
99 return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);
102 static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status)
108 if (gdsc_check_status(sc, status))
112 if (gdsc_check_status(sc, status))
118 static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status)
123 if (status == GDSC_ON && sc->rsupply) {
124 ret = regulator_enable(sc->rsupply);
129 ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val);
134 if ((sc->flags & VOTABLE) && status == GDSC_OFF) {
144 if (sc->gds_hw_ctrl) {
158 ret = gdsc_poll_status(sc, status);
159 WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n");
161 if (!ret && status == GDSC_OFF && sc->rsupply) {
162 ret = regulator_disable(sc->rsupply);
170 static inline int gdsc_deassert_reset(struct gdsc *sc)
174 for (i = 0; i < sc->reset_count; i++)
175 sc->rcdev->ops->deassert(sc->rcdev, sc->resets[i]);
179 static inline int gdsc_assert_reset(struct gdsc *sc)
183 for (i = 0; i < sc->reset_count; i++)
184 sc->rcdev->ops->assert(sc->rcdev, sc->resets[i]);
188 static inline void gdsc_force_mem_on(struct gdsc *sc)
193 if (!(sc->flags & NO_RET_PERIPH))
196 for (i = 0; i < sc->cxc_count; i++)
197 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask);
200 static inline void gdsc_clear_mem_on(struct gdsc *sc)
205 if (!(sc->flags & NO_RET_PERIPH))
208 for (i = 0; i < sc->cxc_count; i++)
209 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0);
212 static inline void gdsc_deassert_clamp_io(struct gdsc *sc)
214 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
218 static inline void gdsc_assert_clamp_io(struct gdsc *sc)
220 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
224 static inline void gdsc_assert_reset_aon(struct gdsc *sc)
226 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
229 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
233 static void gdsc_retain_ff_on(struct gdsc *sc)
237 regmap_update_bits(sc->regmap, sc->gdscr, mask, mask);
242 struct gdsc *sc = domain_to_gdsc(domain);
245 if (sc->pwrsts == PWRSTS_ON)
246 return gdsc_deassert_reset(sc);
248 if (sc->flags & SW_RESET) {
249 gdsc_assert_reset(sc);
251 gdsc_deassert_reset(sc);
254 if (sc->flags & CLAMP_IO) {
255 if (sc->flags & AON_RESET)
256 gdsc_assert_reset_aon(sc);
257 gdsc_deassert_clamp_io(sc);
260 ret = gdsc_toggle_logic(sc, GDSC_ON);
264 if (sc->pwrsts & PWRSTS_OFF)
265 gdsc_force_mem_on(sc);
277 if (sc->flags & HW_CTRL) {
278 ret = gdsc_hwctrl(sc, true);
292 if (sc->flags & RETAIN_FF_ENABLE)
293 gdsc_retain_ff_on(sc);
300 struct gdsc *sc = domain_to_gdsc(domain);
303 if (sc->pwrsts == PWRSTS_ON)
304 return gdsc_assert_reset(sc);
307 if (sc->flags & HW_CTRL) {
308 ret = gdsc_hwctrl(sc, false);
319 ret = gdsc_poll_status(sc, GDSC_ON);
324 if (sc->pwrsts & PWRSTS_OFF)
325 gdsc_clear_mem_on(sc);
327 ret = gdsc_toggle_logic(sc, GDSC_OFF);
331 if (sc->flags & CLAMP_IO)
332 gdsc_assert_clamp_io(sc);
337 static int gdsc_init(struct gdsc *sc)
350 if (!sc->en_rest_wait_val)
351 sc->en_rest_wait_val = EN_REST_WAIT_VAL;
352 if (!sc->en_few_wait_val)
353 sc->en_few_wait_val = EN_FEW_WAIT_VAL;
354 if (!sc->clk_dis_wait_val)
355 sc->clk_dis_wait_val = CLK_DIS_WAIT_VAL;
357 val = sc->en_rest_wait_val << EN_REST_WAIT_SHIFT |
358 sc->en_few_wait_val << EN_FEW_WAIT_SHIFT |
359 sc->clk_dis_wait_val << CLK_DIS_WAIT_SHIFT;
361 ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val);
366 if (sc->pwrsts == PWRSTS_ON) {
367 ret = gdsc_toggle_logic(sc, GDSC_ON);
372 on = gdsc_check_status(sc, GDSC_ON);
378 if (sc->rsupply) {
379 ret = regulator_enable(sc->rsupply);
388 if (sc->flags & VOTABLE) {
389 ret = regmap_update_bits(sc->regmap, sc->gdscr,
396 if (sc->flags & HW_CTRL) {
397 ret = gdsc_hwctrl(sc, true);
407 if (sc->flags & RETAIN_FF_ENABLE)
408 gdsc_retain_ff_on(sc);
409 } else if (sc->flags & ALWAYS_ON) {
411 gdsc_enable(&sc->pd);
415 if (on || (sc->pwrsts & PWRSTS_RET))
416 gdsc_force_mem_on(sc);
418 gdsc_clear_mem_on(sc);
420 if (sc->flags & ALWAYS_ON)
421 sc->pd.flags |= GENPD_FLAG_ALWAYS_ON;
422 if (!sc->pd.power_off)
423 sc->pd.power_off = gdsc_disable;
424 if (!sc->pd.power_on)
425 sc->pd.power_on = gdsc_enable;
426 pm_genpd_init(&sc->pd, NULL, !on);