Lines Matching refs:cpuclk
208 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw);
209 u32 mask = GENMASK(cpuclk->width - 1, 0);
212 regmap_read(clkr->regmap, cpuclk->reg, &val);
213 val >>= cpuclk->shift;
221 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw);
222 u32 mask = GENMASK(cpuclk->width + cpuclk->shift - 1, cpuclk->shift);
226 val <<= cpuclk->shift;
228 return regmap_update_bits(clkr->regmap, cpuclk->reg, mask, val);
234 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw);
235 struct clk_hw *parent = cpuclk->pll;
237 if (cpuclk->pll_div_2 && req->rate < DIV_2_THRESHOLD) {
241 parent = cpuclk->pll_div_2;
459 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_nb(nb);
465 ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, ALT_INDEX);
470 ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
473 ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,