Lines Matching refs:gate
1063 struct lpc32xx_clk_gate gate;
1070 struct clk_hw_proto0 *gate;
1156 .gate = { \
1215 .gate = (CLK_PREFIX(_gate) == LPC32XX_CLK__NULL ? NULL :\
1354 * due to a different connection of gate, div and mux, e.g. gating it
1357 * rtc-->[gate]-->| |
1424 hw = &clk_hw->hw0.gate.hw;
1440 gate0 = clk_hw->hw1.gate;
1475 static void __init lpc32xx_clk_div_quirk(u32 reg, u32 div_mask, u32 gate)
1482 val &= ~gate;
1486 regmap_update_bits(clk_regmap, reg, gate | div_mask, val);
1531 * bitfield, which indicates another clock gate. Instead of
1532 * adding complexity to a gate clock ensure that zero value in