Lines Matching defs:clk_hw
303 struct clk_hw hw;
323 struct clk_hw hw;
333 struct clk_hw hw;
342 struct clk_hw hw;
351 struct clk_hw hw;
360 struct clk_hw hw;
388 static int clk_mask_enable(struct clk_hw *hw)
402 static void clk_mask_disable(struct clk_hw *hw)
410 static int clk_mask_is_enabled(struct clk_hw *hw)
426 static int clk_pll_enable(struct clk_hw *hw)
445 static void clk_pll_disable(struct clk_hw *hw)
452 static int clk_pll_is_enabled(struct clk_hw *hw)
466 static unsigned long clk_pll_397x_recalc_rate(struct clk_hw *hw,
472 static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
532 static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
582 static long clk_hclk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
645 static long clk_usb_pll_round_rate(struct clk_hw *hw, unsigned long rate,
649 struct clk_hw *usb_div_hw, *osc_hw;
713 static int clk_ddram_is_enabled(struct clk_hw *hw)
725 static int clk_ddram_enable(struct clk_hw *hw)
745 static unsigned long clk_ddram_recalc_rate(struct clk_hw *hw,
767 static unsigned long lpc32xx_clk_uart_recalc_rate(struct clk_hw *hw,
797 static int clk_usb_enable(struct clk_hw *hw)
836 static void clk_usb_disable(struct clk_hw *hw)
849 static int clk_usb_is_enabled(struct clk_hw *hw)
865 static unsigned long clk_usb_i2c_recalc_rate(struct clk_hw *hw,
884 static int lpc32xx_clk_gate_enable(struct clk_hw *hw)
893 static void lpc32xx_clk_gate_disable(struct clk_hw *hw)
902 static int lpc32xx_clk_gate_is_enabled(struct clk_hw *hw)
943 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
958 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
978 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
998 static u8 clk_mux_get_parent(struct clk_hw *hw)
1023 static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
1385 struct clk_hw_proto *clk_hw = &clk_hw_proto[id];
1394 parents[0], clk_hw->type);
1396 switch (clk_hw->type) {
1409 .ops = clk_hw->hw0.ops,
1411 struct clk_hw *hw;
1413 if (clk_hw->type == CLK_LPC32XX)
1414 hw = &clk_hw->hw0.clk.hw;
1415 else if (clk_hw->type == CLK_LPC32XX_PLL)
1416 hw = &clk_hw->hw0.pll.hw;
1417 else if (clk_hw->type == CLK_LPC32XX_USB)
1418 hw = &clk_hw->hw0.usb_clk.hw;
1419 else if (clk_hw->type == CLK_MUX)
1420 hw = &clk_hw->hw0.mux.hw;
1421 else if (clk_hw->type == CLK_DIV)
1422 hw = &clk_hw->hw0.div.hw;
1423 else if (clk_hw->type == CLK_GATE)
1424 hw = &clk_hw->hw0.gate.hw;
1434 struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL;
1438 mux0 = clk_hw->hw1.mux;
1439 div0 = clk_hw->hw1.div;
1440 gate0 = clk_hw->hw1.gate;
1462 struct clk_fixed_rate *fixed = &clk_hw->f;