Lines Matching refs:clks
90 static struct clk *clks[clk_max];
112 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
113 clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000);
114 clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0);
115 clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1);
116 clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2);
117 clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3);
118 clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll));
119 clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix));
120 clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io));
121 clks[ssp_sel] = mxs_clk_mux("ssp_sel", CLKSEQ, 5, 1, sel_io, ARRAY_SIZE(sel_io));
122 clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 6, 1, emi_sels, ARRAY_SIZE(emi_sels));
123 clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 7, 1, cpu_sels, ARRAY_SIZE(cpu_sels));
124 clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu));
125 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);
126 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);
127 clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 29);
128 clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31);
129 clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29);
130 clks[ssp_div] = mxs_clk_div("ssp_div", "ssp_sel", SSP, 0, 9, 29);
131 clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29);
132 clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28);
133 clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29);
134 clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29);
135 clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29);
136 clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750);
137 clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768);
138 clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16);
139 clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4);
140 clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26);
141 clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28);
142 clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29);
143 clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30);
144 clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31);
145 clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31);
146 clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31);
147 clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31);
148 clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31);
149 clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31);
150 clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31);
151 clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31);
152 clks[usb] = mxs_clk_gate("usb", "usb_phy", DIGCTRL, 2);
153 clks[usb_phy] = clk_register_gate(NULL, "usb_phy", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock);
155 for (i = 0; i < ARRAY_SIZE(clks); i++)
156 if (IS_ERR(clks[i])) {
158 i, PTR_ERR(clks[i]));
162 clk_data.clks = clks;
163 clk_data.clk_num = ARRAY_SIZE(clks);
167 clk_prepare_enable(clks[clks_init_on[i]]);