Lines Matching refs:clk
12 #include <linux/clk.h>
13 #include <linux/clk/mmp.h>
21 #include "clk.h"
70 struct clk *clk;
71 struct clk *uart_pll;
101 clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
102 clk_register_clkdev(clk, "clk32", NULL);
104 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
105 clk_register_clkdev(clk, "vctcxo", NULL);
107 clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
108 clk_register_clkdev(clk, "pll1", NULL);
110 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",
112 clk_register_clkdev(clk, "pll1_2", NULL);
114 clk = clk_register_fixed_factor(NULL, "pll1_4", "pll1_2",
116 clk_register_clkdev(clk, "pll1_4", NULL);
118 clk = clk_register_fixed_factor(NULL, "pll1_8", "pll1_4",
120 clk_register_clkdev(clk, "pll1_8", NULL);
122 clk = clk_register_fixed_factor(NULL, "pll1_16", "pll1_8",
124 clk_register_clkdev(clk, "pll1_16", NULL);
126 clk = clk_register_fixed_factor(NULL, "pll1_6", "pll1_2",
128 clk_register_clkdev(clk, "pll1_6", NULL);
130 clk = clk_register_fixed_factor(NULL, "pll1_12", "pll1_6",
132 clk_register_clkdev(clk, "pll1_12", NULL);
134 clk = clk_register_fixed_factor(NULL, "pll1_24", "pll1_12",
136 clk_register_clkdev(clk, "pll1_24", NULL);
138 clk = clk_register_fixed_factor(NULL, "pll1_48", "pll1_24",
140 clk_register_clkdev(clk, "pll1_48", NULL);
142 clk = clk_register_fixed_factor(NULL, "pll1_96", "pll1_48",
144 clk_register_clkdev(clk, "pll1_96", NULL);
146 clk = clk_register_fixed_factor(NULL, "pll1_13", "pll1",
148 clk_register_clkdev(clk, "pll1_13", NULL);
150 clk = clk_register_fixed_factor(NULL, "pll1_13_1_5", "pll1",
152 clk_register_clkdev(clk, "pll1_13_1_5", NULL);
154 clk = clk_register_fixed_factor(NULL, "pll1_2_1_5", "pll1",
156 clk_register_clkdev(clk, "pll1_2_1_5", NULL);
158 clk = clk_register_fixed_factor(NULL, "pll1_3_16", "pll1",
160 clk_register_clkdev(clk, "pll1_3_16", NULL);
169 clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
171 clk_register_clkdev(clk, NULL, "pxa2xx-i2c.0");
173 clk = mmp_clk_register_apbc("twsi1", "pll1_13_1_5",
175 clk_register_clkdev(clk, NULL, "pxa2xx-i2c.1");
177 clk = mmp_clk_register_apbc("gpio", "vctcxo",
179 clk_register_clkdev(clk, NULL, "mmp-gpio");
181 clk = mmp_clk_register_apbc("kpc", "clk32",
183 clk_register_clkdev(clk, NULL, "pxa27x-keypad");
185 clk = mmp_clk_register_apbc("rtc", "clk32",
187 clk_register_clkdev(clk, NULL, "sa1100-rtc");
189 clk = mmp_clk_register_apbc("pwm0", "pll1_48",
191 clk_register_clkdev(clk, NULL, "pxa910-pwm.0");
193 clk = mmp_clk_register_apbc("pwm1", "pll1_48",
195 clk_register_clkdev(clk, NULL, "pxa910-pwm.1");
197 clk = mmp_clk_register_apbc("pwm2", "pll1_48",
199 clk_register_clkdev(clk, NULL, "pxa910-pwm.2");
201 clk = mmp_clk_register_apbc("pwm3", "pll1_48",
203 clk_register_clkdev(clk, NULL, "pxa910-pwm.3");
205 clk = clk_register_mux(NULL, "uart0_mux", uart_parent,
209 clk_set_parent(clk, uart_pll);
210 clk_register_clkdev(clk, "uart_mux.0", NULL);
212 clk = mmp_clk_register_apbc("uart0", "uart0_mux",
214 clk_register_clkdev(clk, NULL, "pxa2xx-uart.0");
216 clk = clk_register_mux(NULL, "uart1_mux", uart_parent,
220 clk_set_parent(clk, uart_pll);
221 clk_register_clkdev(clk, "uart_mux.1", NULL);
223 clk = mmp_clk_register_apbc("uart1", "uart1_mux",
225 clk_register_clkdev(clk, NULL, "pxa2xx-uart.1");
227 clk = clk_register_mux(NULL, "uart2_mux", uart_parent,
231 clk_set_parent(clk, uart_pll);
232 clk_register_clkdev(clk, "uart_mux.2", NULL);
234 clk = mmp_clk_register_apbc("uart2", "uart2_mux",
236 clk_register_clkdev(clk, NULL, "pxa2xx-uart.2");
238 clk = clk_register_mux(NULL, "ssp0_mux", ssp_parent,
242 clk_register_clkdev(clk, "uart_mux.0", NULL);
244 clk = mmp_clk_register_apbc("ssp0", "ssp0_mux",
246 clk_register_clkdev(clk, NULL, "mmp-ssp.0");
248 clk = clk_register_mux(NULL, "ssp1_mux", ssp_parent,
252 clk_register_clkdev(clk, "ssp_mux.1", NULL);
254 clk = mmp_clk_register_apbc("ssp1", "ssp1_mux",
256 clk_register_clkdev(clk, NULL, "mmp-ssp.1");
258 clk = mmp_clk_register_apmu("dfc", "pll1_4",
260 clk_register_clkdev(clk, NULL, "pxa3xx-nand.0");
262 clk = clk_register_mux(NULL, "sdh0_mux", sdh_parent,
266 clk_register_clkdev(clk, "sdh0_mux", NULL);
268 clk = mmp_clk_register_apmu("sdh0", "sdh_mux",
270 clk_register_clkdev(clk, NULL, "sdhci-pxa.0");
272 clk = clk_register_mux(NULL, "sdh1_mux", sdh_parent,
276 clk_register_clkdev(clk, "sdh1_mux", NULL);
278 clk = mmp_clk_register_apmu("sdh1", "sdh1_mux",
280 clk_register_clkdev(clk, NULL, "sdhci-pxa.1");
282 clk = mmp_clk_register_apmu("usb", "usb_pll",
284 clk_register_clkdev(clk, "usb_clk", NULL);
286 clk = mmp_clk_register_apmu("sph", "usb_pll",
288 clk_register_clkdev(clk, "sph_clk", NULL);
290 clk = clk_register_mux(NULL, "disp0_mux", disp_parent,
294 clk_register_clkdev(clk, "disp_mux.0", NULL);
296 clk = mmp_clk_register_apmu("disp0", "disp0_mux",
298 clk_register_clkdev(clk, NULL, "mmp-disp.0");
300 clk = clk_register_mux(NULL, "ccic0_mux", ccic_parent,
304 clk_register_clkdev(clk, "ccic_mux.0", NULL);
306 clk = mmp_clk_register_apmu("ccic0", "ccic0_mux",
308 clk_register_clkdev(clk, "fnclk", "mmp-ccic.0");
310 clk = clk_register_mux(NULL, "ccic0_phy_mux", ccic_phy_parent,
314 clk_register_clkdev(clk, "ccic_phy_mux.0", NULL);
316 clk = mmp_clk_register_apmu("ccic0_phy", "ccic0_phy_mux",
318 clk_register_clkdev(clk, "phyclk", "mmp-ccic.0");
320 clk = clk_register_divider(NULL, "ccic0_sphy_div", "ccic0_mux",
323 clk_register_clkdev(clk, "sphyclk_div", NULL);
325 clk = mmp_clk_register_apmu("ccic0_sphy", "ccic0_sphy_div",
327 clk_register_clkdev(clk, "sphyclk", "mmp-ccic.0");