Lines Matching defs:apbc_base
76 void __iomem *apbc_base;
90 apbc_base = ioremap(apbc_phys, SZ_4K);
91 if (!apbc_base) {
165 apbc_base + APBC_TWSI0, 10, 0, &clk_lock);
169 apbc_base + APBC_TWSI1, 10, 0, &clk_lock);
173 apbc_base + APBC_GPIO, 10, 0, &clk_lock);
177 apbc_base + APBC_KPC, 10, 0, &clk_lock);
181 apbc_base + APBC_RTC, 10, 0, &clk_lock);
185 apbc_base + APBC_PWM0, 10, 0, &clk_lock);
189 apbc_base + APBC_PWM1, 10, 0, &clk_lock);
193 apbc_base + APBC_PWM2, 10, 0, &clk_lock);
197 apbc_base + APBC_PWM3, 10, 0, &clk_lock);
203 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
208 apbc_base + APBC_UART0, 10, 0, &clk_lock);
214 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
219 apbc_base + APBC_UART1, 10, 0, &clk_lock);
225 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
230 apbc_base + APBC_UART2, 10, 0, &clk_lock);
236 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);
239 clk = mmp_clk_register_apbc("ssp0", "ssp0_mux", apbc_base + APBC_SSP0,
246 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);
249 clk = mmp_clk_register_apbc("ssp1", "ssp1_mux", apbc_base + APBC_SSP1,
256 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock);
259 clk = mmp_clk_register_apbc("ssp2", "ssp1_mux", apbc_base + APBC_SSP2,
266 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock);
269 clk = mmp_clk_register_apbc("ssp3", "ssp1_mux", apbc_base + APBC_SSP3,
276 apbc_base + APBC_SSP4, 4, 3, 0, &clk_lock);
279 clk = mmp_clk_register_apbc("ssp4", "ssp1_mux", apbc_base + APBC_SSP4,