Lines Matching refs:AO_CLK_GATE0
28 #define AO_CLK_GATE0 0x4c
60 AXG_AO_GATE(ahb, AO_CLK_GATE0, 0);
61 AXG_AO_GATE(ir_in, AO_CLK_GATE0, 1);
62 AXG_AO_GATE(i2c_m0, AO_CLK_GATE0, 2);
63 AXG_AO_GATE(i2c_s0, AO_CLK_GATE0, 3);
64 AXG_AO_GATE(uart, AO_CLK_GATE0, 4);
65 AXG_AO_GATE(prod_i2c, AO_CLK_GATE0, 5);
66 AXG_AO_GATE(uart2, AO_CLK_GATE0, 6);
67 AXG_AO_GATE(ir_out, AO_CLK_GATE0, 7);
68 AXG_AO_GATE(saradc, AO_CLK_GATE0, 8);