Lines Matching refs:spdifin_clk
370 AUD_MST_SYS_MUX(spdifin_clk, AUDIO_CLK_SPDIFIN_CTRL);
381 AUD_MST_SYS_DIV(spdifin_clk, AUDIO_CLK_SPDIFIN_CTRL);
389 static struct clk_regmap spdifin_clk =
390 AUD_MST_MCLK_GATE(spdifin_clk, AUDIO_CLK_SPDIFIN_CTRL);
859 [AUD_CLKID_SPDIFIN_CLK] = &spdifin_clk.hw,
996 [AUD_CLKID_SPDIFIN_CLK] = &spdifin_clk.hw,
1140 [AUD_CLKID_SPDIFIN_CLK] = &spdifin_clk.hw,
1292 &spdifin_clk,
1417 &spdifin_clk,
1554 &spdifin_clk,