Lines Matching defs:shift
40 * @pllm_upper_shift: multiplier upper shift
43 * @clkod_shift: output divider shift
252 u32 shift, mask;
270 if (of_property_read_u32(node, "bit-shift", &shift)) {
271 pr_err("%s: missing 'shift' property\n", __func__);
282 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,
301 u32 shift, mask;
319 if (of_property_read_u32(node, "bit-shift", &shift)) {
320 pr_err("%s: missing 'shift' property\n", __func__);
330 ARRAY_SIZE(parents) , 0, reg, shift, mask,