Lines Matching defs:node
154 * @node: device tree node for this clock
158 static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
171 parent_name = of_clk_get_parent_name(node, 0);
172 if (of_property_read_u32(node, "fixed-postdiv", &pll_data->postdiv)) {
181 i = of_property_match_string(node, "reg-names",
183 pll_data->pllod = of_iomap(node, i);
186 i = of_property_match_string(node, "reg-names", "control");
187 pll_data->pll_ctl0 = of_iomap(node, i);
202 i = of_property_match_string(node, "reg-names", "multiplier");
203 pll_data->pllm = of_iomap(node, i);
211 clk = clk_register_pll(NULL, node->name, parent_name, pll_data);
213 of_clk_add_provider(node, of_clk_src_simple_get, clk);
218 pr_err("%s: error initializing pll %pOFn\n", __func__, node);
224 * @node: device tree node for this clock
226 static void __init of_keystone_pll_clk_init(struct device_node *node)
228 _of_pll_clk_init(node, false);
235 * @node: device tree node for this clock
237 static void __init of_keystone_main_pll_clk_init(struct device_node *node)
239 _of_pll_clk_init(node, true);
246 * @node: device tree node for this clock
248 static void __init of_pll_div_clk_init(struct device_node *node)
254 const char *clk_name = node->name;
256 of_property_read_string(node, "clock-output-names", &clk_name);
257 reg = of_iomap(node, 0);
263 parent_name = of_clk_get_parent_name(node, 0);
270 if (of_property_read_u32(node, "bit-shift", &shift)) {
276 if (of_property_read_u32(node, "bit-mask", &mask)) {
290 of_clk_add_provider(node, of_clk_src_simple_get, clk);
296 * @node: device tree node for this clock
298 static void __init of_pll_mux_clk_init(struct device_node *node)
304 const char *clk_name = node->name;
306 of_property_read_string(node, "clock-output-names", &clk_name);
307 reg = of_iomap(node, 0);
313 of_clk_parent_fill(node, parents, 2);
319 if (of_property_read_u32(node, "bit-shift", &shift)) {
324 if (of_property_read_u32(node, "bit-mask", &mask)) {
337 of_clk_add_provider(node, of_clk_src_simple_get, clk);