Lines Matching refs:CGU_CLK_GATE
168 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
185 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
205 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
212 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
219 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
226 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
233 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
240 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
247 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
254 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
261 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
285 "i2s", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
293 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
304 "ssi0", CGU_CLK_GATE,
309 "ssi1", CGU_CLK_GATE,
314 "ssi2", CGU_CLK_GATE,
319 "pcm0", CGU_CLK_GATE,
324 "pcm1", CGU_CLK_GATE,
329 "dma", CGU_CLK_GATE,
334 "i2c0", CGU_CLK_GATE,
339 "i2c1", CGU_CLK_GATE,
344 "i2c2", CGU_CLK_GATE,
349 "uart0", CGU_CLK_GATE,
354 "uart1", CGU_CLK_GATE,
359 "uart2", CGU_CLK_GATE,
364 "uart3", CGU_CLK_GATE,
369 "ipu", CGU_CLK_GATE,
374 "adc", CGU_CLK_GATE,
379 "aic", CGU_CLK_GATE,
384 "aux", CGU_CLK_GATE,
389 "vpu", CGU_CLK_GATE,
394 "mmc0", CGU_CLK_GATE,
399 "mmc1", CGU_CLK_GATE,
404 "mmc2", CGU_CLK_GATE,
409 "usb_phy", CGU_CLK_GATE,