Lines Matching defs:ctl
88 u32 ctl;
93 ctl = readl(cgu->base + pll_info->reg);
95 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0);
97 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0);
99 od_enc = ctl >> pll_info->od_shift;
102 ctl = readl(cgu->base + pll_info->bypass_reg);
105 !!(ctl & BIT(pll_info->bypass_bit));
168 u32 ctl;
170 return readl_poll_timeout(cgu->base + pll_info->reg, ctl,
171 ctl & BIT(pll_info->stable_bit),
186 u32 ctl;
195 ctl = readl(cgu->base + pll_info->reg);
197 ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift);
198 ctl |= (m - pll_info->m_offset) << pll_info->m_shift;
200 ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift);
201 ctl |= (n - pll_info->n_offset) << pll_info->n_shift;
203 ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift);
204 ctl |= pll_info->od_encoding[od - 1] << pll_info->od_shift;
206 writel(ctl, cgu->base + pll_info->reg);
209 if (ctl & BIT(pll_info->enable_bit))
225 u32 ctl;
228 ctl = readl(cgu->base + pll_info->bypass_reg);
230 ctl &= ~BIT(pll_info->bypass_bit);
232 writel(ctl, cgu->base + pll_info->bypass_reg);
234 ctl = readl(cgu->base + pll_info->reg);
236 ctl |= BIT(pll_info->enable_bit);
238 writel(ctl, cgu->base + pll_info->reg);
253 u32 ctl;
256 ctl = readl(cgu->base + pll_info->reg);
258 ctl &= ~BIT(pll_info->enable_bit);
260 writel(ctl, cgu->base + pll_info->reg);
270 u32 ctl;
272 ctl = readl(cgu->base + pll_info->reg);
274 return !!(ctl & BIT(pll_info->enable_bit));