Lines Matching defs:width
90 #define imx_clk_divider(name, parent, reg, shift, width) \
91 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
93 #define imx_clk_divider2(name, parent, reg, shift, width) \
94 to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width))
96 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \
97 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
120 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \
121 to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents))
224 void __iomem *reg, u8 shift, u8 width,
228 u8 width, void __iomem *busy_reg, u8 busy_shift,
238 void __iomem *reg, u8 shift, u8 width,
242 u8 shift, u8 width, const char * const *parents,
265 u8 shift, u8 width, const char * const *parents,
270 shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);
283 u8 width)
286 reg, shift, width, 0, &imx_ccm_lock);
292 u8 width, unsigned long flags)
295 reg, shift, width, 0, &imx_ccm_lock);
299 void __iomem *reg, u8 shift, u8 width)
303 reg, shift, width, 0, &imx_ccm_lock);
307 const char *parent, void __iomem *reg, u8 shift, u8 width,
312 reg, shift, width, 0, &imx_ccm_lock);
440 u8 shift, u8 width, const char * const *parents,
445 width, 0, &imx_ccm_lock);
450 u8 width, const char * const *parents, int num_parents)
454 reg, shift, width, 0, &imx_ccm_lock);
458 u8 shift, u8 width, const char * const *parents,
463 reg, shift, width, 0, &imx_ccm_lock);
467 u8 shift, u8 width,
474 reg, shift, width, 0, &imx_ccm_lock);
478 void __iomem *reg, u8 shift, u8 width,
483 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
488 void __iomem *reg, u8 shift, u8 width,
494 reg, shift, width, 0, &imx_ccm_lock);
498 void __iomem *reg, u8 shift, u8 width,
504 reg, shift, width, 0, &imx_ccm_lock);
509 u8 width,
516 reg, shift, width, 0, &imx_ccm_lock);
522 u8 width,
529 reg, shift, width, 0, &imx_ccm_lock);
601 unsigned long flags, void __iomem *reg, u8 shift, u8 width,