Lines Matching defs:parent_name
229 * @parent_name: the parent clock name
236 const char *parent_name,
240 const char * const *parent_names = parent_name ? &parent_name : NULL;
241 int num_parents = parent_name ? 1 : 0;
351 * @parent_name: The parent clock name
368 const char *parent_name,
397 parent_name, 0, 1, 1);
401 parent_name = OSCIN_CLK_NAME;
416 parent_name, flags, 1, 8);
419 parent_name, base + PREDIV, fixed, flags);
425 parent_name = prediv_name;
451 init.parent_names = &parent_name;
473 parent_name = pllout_name;
485 parent_name, base + POSTDIV, fixed, flags);
491 parent_name = postdiv_name;
504 init.parent_names = &parent_name;
725 clk = clk_register_composite(dev, info->name, &info->parent_name, 1,
754 const char *parent_name;
758 parent_name = of_clk_get_parent_name(node, 0);
760 parent_name = OSCIN_CLK_NAME;
762 clk = davinci_pll_clk_register(dev, info, parent_name, base, cfgchip);