Lines Matching defs:dev
60 int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip)
64 davinci_pll_clk_register(dev, &dm365_pll1_info, "ref_clk", base, cfgchip);
66 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk1, base);
69 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk2, base);
72 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk3, base);
75 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk4, base);
78 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk5, base);
81 davinci_pll_sysclk_register(dev, &pll1_sysclk6, base);
83 davinci_pll_sysclk_register(dev, &pll1_sysclk7, base);
85 clk = davinci_pll_sysclk_register(dev, &pll1_sysclk8, base);
88 davinci_pll_sysclk_register(dev, &pll1_sysclk9, base);
90 clk = davinci_pll_auxclk_register(dev, "pll1_auxclk", base);
93 davinci_pll_sysclkbp_clk_register(dev, "pll1_sysclkbp", base);
95 davinci_pll_obsclk_register(dev, &dm365_pll1_obsclk_info, base);
123 int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip)
127 davinci_pll_clk_register(dev, &dm365_pll2_info, "oscin", base, cfgchip);
129 davinci_pll_sysclk_register(dev, &pll2_sysclk1, base);
131 clk = davinci_pll_sysclk_register(dev, &pll2_sysclk2, base);
134 davinci_pll_sysclk_register(dev, &pll2_sysclk3, base);
136 clk = davinci_pll_sysclk_register(dev, &pll2_sysclk4, base);
139 davinci_pll_sysclk_register(dev, &pll2_sysclk5, base);
141 davinci_pll_auxclk_register(dev, "pll2_auxclk", base);
143 davinci_pll_obsclk_register(dev, &dm365_pll2_obsclk_info, base);