Lines Matching defs:wm831x

15 #include <linux/mfd/wm831x/core.h>
18 struct wm831x *wm831x;
70 struct wm831x *wm831x = clkdata->wm831x;
73 ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_1);
75 dev_err(wm831x->dev, "Unable to read FLL_CONTROL_1: %d\n",
87 struct wm831x *wm831x = clkdata->wm831x;
90 ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_1,
93 dev_crit(wm831x->dev, "Failed to enable FLL: %d\n", ret);
105 struct wm831x *wm831x = clkdata->wm831x;
108 ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_1, WM831X_FLL_ENA, 0);
110 dev_crit(wm831x->dev, "Failed to disable FLL: %d\n", ret);
118 struct wm831x *wm831x = clkdata->wm831x;
121 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
123 dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
131 dev_err(wm831x->dev, "FLL only supported in AUTO mode\n");
155 struct wm831x *wm831x = clkdata->wm831x;
167 return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_2,
180 struct wm831x *wm831x = clkdata->wm831x;
184 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
186 dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
194 ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_5);
196 dev_err(wm831x->dev, "Unable to read FLL_CONTROL_5: %d\n",
207 dev_err(wm831x->dev, "Unsupported FLL clock source %d\n",
235 struct wm831x *wm831x = clkdata->wm831x;
238 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1);
240 dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d\n",
252 struct wm831x *wm831x = clkdata->wm831x;
255 ret = wm831x_reg_unlock(wm831x);
257 dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
261 ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
264 dev_crit(wm831x->dev, "Failed to enable CLKOUT: %d\n", ret);
266 wm831x_reg_lock(wm831x);
275 struct wm831x *wm831x = clkdata->wm831x;
278 ret = wm831x_reg_unlock(wm831x);
280 dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
284 ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
287 dev_crit(wm831x->dev, "Failed to disable CLKOUT: %d\n", ret);
289 wm831x_reg_lock(wm831x);
301 struct wm831x *wm831x = clkdata->wm831x;
304 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1);
306 dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d\n",
321 struct wm831x *wm831x = clkdata->wm831x;
323 return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
346 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
354 clkdata->wm831x = wm831x;
357 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
359 dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
388 .name = "wm831x-clk",
398 MODULE_ALIAS("platform:wm831x-clk");