Lines Matching refs:div1
456 int div1, div2;
462 for (div1 = 1; div1 >= 0; div1--)
465 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2));
471 *filter = wm8750_get_filter(parent_rate, div1);
473 *divisor1 = div1;
481 *divisor1 = div1;
504 int div1, div2;
510 for (div1 = 1; div1 >= 0; div1--)
514 ((div1 + 1) * (1 << div2));
521 *divisor1 = div1;
529 *divisor1 = div1;
550 u32 filter, mul, div1, div2;
559 ret = vt8500_find_pll_bits(rate, parent_rate, &mul, &div1);
561 pll_val = VT8500_BITS_TO_VAL(mul, div1);
564 ret = wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);
566 pll_val = WM8650_BITS_TO_VAL(mul, div1, div2);
569 ret = wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2);
571 pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2);
574 ret = wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);
576 pll_val = WM8850_BITS_TO_VAL(mul, div1, div2);
601 u32 filter, mul, div1, div2;
607 ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1);
609 round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1);
612 ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2);
614 round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2);
617 ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2);
619 round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2);
622 ret = wm8850_find_pll_bits(rate, *prate, &mul, &div1, &div2);
624 round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2);