Lines Matching refs:clkout
63 struct si5351_hw_data *clkout;
797 * Si5351 clkout divider
917 __func__, clk_hw_get_name(&drvdata->clkout[num].hw),
935 if (pdata->clkout[hwdata->num].pll_reset)
1039 /* clkout freqency is 8kHz - 160MHz */
1120 /* powerup clkout */
1211 /* per clkout properties */
1221 dev_err(&client->dev, "invalid clkout %d\n", num);
1229 pdata->clkout[num].multisynth_src =
1233 pdata->clkout[num].multisynth_src =
1247 pdata->clkout[num].clkout_src =
1251 pdata->clkout[num].clkout_src =
1255 pdata->clkout[num].clkout_src =
1261 "invalid parent %d for clkout %d\n",
1265 pdata->clkout[num].clkout_src =
1270 "invalid parent %d for clkout %d\n",
1283 pdata->clkout[num].drive = val;
1287 "invalid drive strength %d for clkout %d\n",
1297 pdata->clkout[num].disable_state =
1301 pdata->clkout[num].disable_state =
1305 pdata->clkout[num].disable_state =
1309 pdata->clkout[num].disable_state =
1314 "invalid disable state %d for clkout %d\n",
1321 pdata->clkout[num].rate = val;
1323 pdata->clkout[num].pll_master =
1326 pdata->clkout[num].pll_reset =
1348 return &drvdata->clkout[idx].hw;
1432 pdata->clkout[n].multisynth_src);
1436 n, pdata->clkout[n].multisynth_src);
1441 pdata->clkout[n].clkout_src);
1444 "failed to reparent clkout %d to %d\n",
1445 n, pdata->clkout[n].clkout_src);
1450 pdata->clkout[n].drive);
1453 "failed set drive strength of clkout%d to %d\n",
1454 n, pdata->clkout[n].drive);
1459 pdata->clkout[n].disable_state);
1462 "failed set disable state of clkout%d to %d\n",
1463 n, pdata->clkout[n].disable_state);
1559 drvdata->clkout = devm_kcalloc(&client->dev, num_clocks,
1560 sizeof(*drvdata->clkout), GFP_KERNEL);
1563 if (WARN_ON(!drvdata->msynth || !drvdata->clkout)) {
1576 if (pdata->clkout[n].pll_master)
1597 drvdata->clkout[n].num = n;
1598 drvdata->clkout[n].drvdata = drvdata;
1599 drvdata->clkout[n].hw.init = &init;
1604 if (pdata->clkout[n].clkout_src == SI5351_CLKOUT_SRC_MSYNTH_N)
1609 &drvdata->clkout[n].hw);
1616 /* set initial clkout rate */
1617 if (pdata->clkout[n].rate != 0) {
1619 ret = clk_set_rate(drvdata->clkout[n].hw.clk,
1620 pdata->clkout[n].rate);