Lines Matching defs:divby4
165 /* save rdiv and divby4 */
650 int divby4;
662 divby4 = 0;
664 divby4 = 1;
672 if (divby4 == 0) {
696 /* disable divby4 */
697 if (divby4) {
699 divby4 = 0;
731 if (divby4) {
748 "%s - %s: a = %lu, b = %lu, c = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n",
749 __func__, clk_hw_get_name(hw), a, b, c, divby4,
761 int divby4 = 0;
767 divby4 = 1;
769 /* enable/disable integer mode and divby4 on multisynth0-5 */
773 (divby4) ? SI5351_OUTPUT_CLK_DIVBY4 : 0);
780 "%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n",
783 divby4, parent_rate, rate);