Lines Matching refs:value
165 u8 value;
362 /* Read and interpret a 44-bit followed by a 32-bit value in the regmap */
440 /* Report kHz since the value is out of range */
754 /* Bit 0=PDN, 1=OE so only a value of 0x2 enables the output */
811 /* Calculate value as 24-bit integer*/
879 /* For a value of "2", we set the "OUT0_RDIV_FORCE2" bit */
887 /* Always write Rx_REG, because a zero value disables the divider */
943 /* Read the PLL divider value, it must have a non-zero value */
1098 values[i].address, values[i].value);
1102 values[i].address, values[i].value);