Lines Matching defs:output
59 /* The output stages can be connected to any synth (full mux) */
134 #define SI5341_OUT_CONFIG(output) \
135 ((output)->data->reg_output_offset[(output)->index])
136 #define SI5341_OUT_FORMAT(output) (SI5341_OUT_CONFIG(output) + 1)
137 #define SI5341_OUT_CM(output) (SI5341_OUT_CONFIG(output) + 2)
138 #define SI5341_OUT_MUX_SEL(output) (SI5341_OUT_CONFIG(output) + 3)
139 #define SI5341_OUT_R_REG(output) \
140 ((output)->data->reg_rdiv_offset[(output)->index])
149 /* Synthesizer output enable, phase bypass, power mode */
219 * The "known" settings like synth and output configuration are done later.
594 /* Disable output */
624 /* Enable output */
745 struct clk_si5341_output *output = to_clk_si5341_output(hw);
749 err = regmap_read(output->data->regmap,
750 SI5341_OUT_CONFIG(output), &val);
754 /* Bit 0=PDN, 1=OE so only a value of 0x2 enables the output */
758 /* Disables and then powers down the output */
761 struct clk_si5341_output *output = to_clk_si5341_output(hw);
763 regmap_update_bits(output->data->regmap,
764 SI5341_OUT_CONFIG(output),
766 regmap_update_bits(output->data->regmap,
767 SI5341_OUT_CONFIG(output),
771 /* Powers up and then enables the output */
774 struct clk_si5341_output *output = to_clk_si5341_output(hw);
777 err = regmap_update_bits(output->data->regmap,
778 SI5341_OUT_CONFIG(output),
783 return regmap_update_bits(output->data->regmap,
784 SI5341_OUT_CONFIG(output),
791 struct clk_si5341_output *output = to_clk_si5341_output(hw);
797 err = regmap_read(output->data->regmap,
798 SI5341_OUT_CONFIG(output), &val);
806 err = regmap_bulk_read(output->data->regmap,
807 SI5341_OUT_R_REG(output), r, 3);
861 struct clk_si5341_output *output = to_clk_si5341_output(hw);
880 err = regmap_update_bits(output->data->regmap,
881 SI5341_OUT_CONFIG(output),
891 return regmap_bulk_write(output->data->regmap,
892 SI5341_OUT_R_REG(output), r, 3);
895 static int si5341_output_reparent(struct clk_si5341_output *output, u8 index)
897 return regmap_update_bits(output->data->regmap,
898 SI5341_OUT_MUX_SEL(output), 0x07, index);
903 struct clk_si5341_output *output = to_clk_si5341_output(hw);
905 if (index >= output->data->num_synth)
908 return si5341_output_reparent(output, index);
913 struct clk_si5341_output *output = to_clk_si5341_output(hw);
916 regmap_read(output->data->regmap, SI5341_OUT_MUX_SEL(output), &val);
963 "invalid output index %u\n", idx);
1604 if (of_property_read_string(client->dev.of_node, "clock-output-names",
1732 "output %u registration failed\n", i);