Lines Matching defs:clockgen
31 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */
63 struct clockgen;
79 void (*init_periph)(struct clockgen *cg);
85 struct clockgen {
97 static struct clockgen clockgen;
100 static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg)
108 static u32 cg_in(struct clockgen *cg, u32 __iomem *reg)
467 static void __init p2041_init_periph(struct clockgen *cg)
479 static void __init p4080_init_periph(struct clockgen *cg)
496 static void __init p5020_init_periph(struct clockgen *cg)
511 static void __init p5040_init_periph(struct clockgen *cg)
531 static void __init t1023_init_periph(struct clockgen *cg)
536 static void __init t1040_init_periph(struct clockgen *cg)
541 static void __init t2080_init_periph(struct clockgen *cg)
546 static void __init t4240_init_periph(struct clockgen *cg)
554 .compat = "fsl,b4420-clockgen",
570 .compat = "fsl,b4860-clockgen",
586 .compat = "fsl,ls1021a-clockgen",
596 .compat = "fsl,ls1028a-clockgen",
611 .compat = "fsl,ls1043a-clockgen",
626 .compat = "fsl,ls1046a-clockgen",
641 .compat = "fsl,ls1088a-clockgen",
655 .compat = "fsl,ls1012a-clockgen",
665 .compat = "fsl,ls2080a-clockgen",
676 .compat = "fsl,lx2160a-clockgen",
687 .compat = "fsl,p2041-clockgen",
699 .compat = "fsl,p3041-clockgen",
711 .compat = "fsl,p4080-clockgen",
723 .compat = "fsl,p5020-clockgen",
735 .compat = "fsl,p5040-clockgen",
747 .compat = "fsl,t1023-clockgen",
763 .compat = "fsl,t1040-clockgen",
776 .compat = "fsl,t2080-clockgen",
792 .compat = "fsl,t4240-clockgen",
812 struct clockgen *cg;
868 static const struct clockgen_pll_div *get_pll_div(struct clockgen *cg,
883 static struct clk * __init create_mux_common(struct clockgen *cg,
944 static struct clk * __init create_one_cmux(struct clockgen *cg, int idx)
992 static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx)
1007 static void __init create_muxes(struct clockgen *cg)
1034 * Legacy nodes may get probed before the parent clockgen node.
1041 if (!clockgen.node) {
1063 clk = clockgen.cmux[idx];
1104 clk = of_clk_get_by_name(clockgen.node, dtname);
1115 clk = of_clk_get(clockgen.node, 0);
1127 clk = sysclk_from_fixed(clockgen.node, name);
1139 sysclk = of_get_child_by_name(clockgen.node, "sysclk");
1178 clk = clockgen.sysclk;
1185 static void __init create_one_pll(struct clockgen *cg, int idx)
1277 static void __init create_plls(struct clockgen *cg)
1294 pll = &clockgen.pll[idx];
1363 struct clockgen *cg = data;
1471 if (clockgen.node)
1474 clockgen.node = np;
1475 clockgen.regs = of_iomap(np, 0);
1476 if (!clockgen.regs &&
1479 clockgen.regs = ioremap(0x1ee1000, 0x1000);
1482 if (!clockgen.regs) {
1491 !strcmp(chipinfo[i].compat, "fsl,ls1021a-clockgen"))
1496 pr_err("%s: unknown clockgen node %pOF\n", __func__, np);
1499 clockgen.info = chipinfo[i];
1501 if (clockgen.info.guts_compat) {
1505 clockgen.info.guts_compat);
1507 clockgen.guts = of_iomap(guts, 0);
1508 if (!clockgen.guts) {
1518 clockgen.info.flags |= CG_CMUX_GE_PLAT;
1520 clockgen.sysclk = create_sysclk("cg-sysclk");
1521 clockgen.coreclk = create_coreclk("cg-coreclk");
1522 create_plls(&clockgen);
1523 create_muxes(&clockgen);
1525 if (clockgen.info.init_periph)
1526 clockgen.info.init_periph(&clockgen);
1528 ret = of_clk_add_provider(np, clockgen_clk_get, &clockgen);
1534 /* Don't create cpufreq device for legacy clockgen blocks */
1539 iounmap(clockgen.regs);
1540 clockgen.regs = NULL;
1563 CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
1564 CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
1565 CLK_OF_DECLARE(qoriq_clockgen_b4420, "fsl,b4420-clockgen", clockgen_init);
1566 CLK_OF_DECLARE(qoriq_clockgen_b4860, "fsl,b4860-clockgen", clockgen_init);
1567 CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
1568 CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
1569 CLK_OF_DECLARE(qoriq_clockgen_ls1028a, "fsl,ls1028a-clockgen", clockgen_init);
1570 CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
1571 CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
1572 CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
1573 CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
1574 CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
1575 CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
1576 CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
1577 CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
1578 CLK_OF_DECLARE(qoriq_clockgen_p5020, "fsl,p5020-clockgen", clockgen_init);
1579 CLK_OF_DECLARE(qoriq_clockgen_p5040, "fsl,p5040-clockgen", clockgen_init);
1580 CLK_OF_DECLARE(qoriq_clockgen_t1023, "fsl,t1023-clockgen", clockgen_init);
1581 CLK_OF_DECLARE(qoriq_clockgen_t1040, "fsl,t1040-clockgen", clockgen_init);
1582 CLK_OF_DECLARE(qoriq_clockgen_t2080, "fsl,t2080-clockgen", clockgen_init);
1583 CLK_OF_DECLARE(qoriq_clockgen_t4240, "fsl,t4240-clockgen", clockgen_init);