Lines Matching refs:divq
97 unsigned long divf, divq, vco_freq, reg;
104 divq = (reg & HB_PLL_DIVQ_MASK) >> HB_PLL_DIVQ_SHIFT;
107 return vco_freq / (1 << divq);
113 u32 divq, divf;
121 for (divq = 1; divq <= 6; divq++) {
122 if ((rate * (1 << divq)) >= HB_PLL_VCO_MIN_FREQ)
126 vco_freq = rate * (1 << divq);
130 *pdivq = divq;
137 u32 divq, divf;
140 clk_pll_calc(rate, ref_freq, &divq, &divf);
142 return (ref_freq * (divf + 1)) / (1 << divq);
149 u32 divq, divf;
152 clk_pll_calc(rate, parent_rate, &divq, &divf);
162 reg |= (divf << HB_PLL_DIVF_SHIFT) | (divq << HB_PLL_DIVQ_SHIFT);
175 reg |= divq << HB_PLL_DIVQ_SHIFT;