Lines Matching defs:mult
18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
28 rate = (unsigned long long int)parent_rate * fix->mult;
41 best_parent = (rate / fix->mult) * fix->div;
45 return (*prate / fix->div) * fix->mult;
70 unsigned long flags, unsigned int mult, unsigned int div)
83 fix->mult = mult;
111 unsigned int mult, unsigned int div)
114 flags, mult, div);
120 unsigned int mult, unsigned int div)
124 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
167 u32 div, mult;
176 if (of_property_read_u32(node, "clock-mult", &mult)) {
177 pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
188 flags, mult, div);