clk-divider.c - OpenGrok cross reference for /kernel/linux/linux-5.10/drivers/clk/clk-divider.c

Lines Matching refs:divider
7  * Adjustable divider clock implementation
19  * DOC: basic adjustable divider clock that cannot gate
28 static inline u32 clk_div_readl(struct clk_divider *divider)
30 	if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
31 		return ioread32be(divider->reg);
33 	return readl(divider->reg);
36 static inline void clk_div_writel(struct clk_divider *divider, u32 val)
38 	if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
39 		iowrite32be(val, divider->reg);
41 		writel(val, divider->reg);
151 	struct clk_divider *divider = to_clk_divider(hw);
154 	val = clk_div_readl(divider) >> divider->shift;
155 	val &= clk_div_mask(divider->width);
157 	return divider_recalc_rate(hw, parent_rate, val, divider->table,
158 				   divider->flags, divider->width);
312 	 * The maximum divider we can use without overflowing
323 			 * parent rate, so return the divider immediately.
383 	struct clk_divider *divider = to_clk_divider(hw);
386 	if (divider->flags & CLK_DIVIDER_READ_ONLY) {
389 		val = clk_div_readl(divider) >> divider->shift;
390 		val &= clk_div_mask(divider->width);
392 		return divider_ro_round_rate(hw, rate, prate, divider->table,
393 					     divider->width, divider->flags,
397 	return divider_round_rate(hw, rate, prate, divider->table,
398 				  divider->width, divider->flags);
421 	struct clk_divider *divider = to_clk_divider(hw);
426 	value = divider_get_val(rate, parent_rate, divider->table,
427 				divider->width, divider->flags);
431 	if (divider->lock)
432 		spin_lock_irqsave(divider->lock, flags);
434 		__acquire(divider->lock);
436 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
437 		val = clk_div_mask(divider->width) << (divider->shift + 16);
439 		val = clk_div_readl(divider);
440 		val &= ~(clk_div_mask(divider->width) << divider->shift);
442 	val |= (u32)value << divider->shift;
443 	clk_div_writel(divider, val);
445 	if (divider->lock)
446 		spin_unlock_irqrestore(divider->lock, flags);
448 		__release(divider->lock);
480 			pr_warn("divider value exceeds LOWORD field\n");
485 	/* allocate the divider */
526  * clk_register_divider_table - register a table based divider clock with
532  * @reg: register address to adjust divider
535  * @clk_divider_flags: divider-specific flags for this clock
536  * @table: array of divider/value pairs ending with a div set to 0
573  * clk_hw_unregister_divider - unregister a clk divider