Lines Matching refs:data
104 struct clk_cdce925_pll *data = to_clk_cdce925_pll(hw);
106 return cdce925_pll_calculate_rate(parent_rate, data->n, data->m);
158 struct clk_cdce925_pll *data = to_clk_cdce925_pll(hw);
161 data->m = 0; /* Bypass mode */
162 data->n = 0;
178 cdce925_pll_find_rate(rate, parent_rate, &data->n, &data->m);
219 struct clk_cdce925_pll *data = to_clk_cdce925_pll(hw);
220 u16 n = data->n;
221 u16 m = data->m;
227 u8 reg_ofs = data->index * CDCE925_OFFSET_PLL;
232 regmap_update_bits(data->chip->regmap,
235 /* According to data sheet: */
261 regmap_write(data->chip->regmap,
264 regmap_update_bits(data->chip->regmap,
273 struct clk_cdce925_pll *data = to_clk_cdce925_pll(hw);
274 u8 reg_ofs = data->index * CDCE925_OFFSET_PLL;
276 regmap_update_bits(data->chip->regmap,
289 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv)
291 switch (data->index) {
293 regmap_update_bits(data->chip->regmap,
296 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF);
299 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv);
302 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv);
305 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv);
308 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv);
311 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv);
314 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv);
317 regmap_update_bits(data->chip->regmap, 0x46, 0x7F, pdiv);
320 regmap_update_bits(data->chip->regmap, 0x47, 0x7F, pdiv);
325 static void cdce925_clk_activate(struct clk_cdce925_output *data)
327 switch (data->index) {
329 regmap_update_bits(data->chip->regmap,
334 regmap_update_bits(data->chip->regmap, 0x14, 0x03, 0x03);
338 regmap_update_bits(data->chip->regmap, 0x24, 0x03, 0x03);
342 regmap_update_bits(data->chip->regmap, 0x34, 0x03, 0x03);
346 regmap_update_bits(data->chip->regmap, 0x44, 0x03, 0x03);
353 struct clk_cdce925_output *data = to_clk_cdce925_output(hw);
355 cdce925_clk_set_pdiv(data, data->pdiv);
356 cdce925_clk_activate(data);
362 struct clk_cdce925_output *data = to_clk_cdce925_output(hw);
365 cdce925_clk_set_pdiv(data, 0);
371 struct clk_cdce925_output *data = to_clk_cdce925_output(hw);
373 if (data->pdiv)
374 return parent_rate / data->pdiv;
458 struct clk_cdce925_output *data = to_clk_cdce925_output(hw);
460 data->pdiv = cdce925_calc_divider(rate, parent_rate);
505 struct clk_cdce925_output *data = to_clk_cdce925_output(hw);
507 data->pdiv = cdce925_y1_calc_divider(rate, parent_rate);
524 void *context, const void *data, size_t count)
535 reg_data[0] = CDCE925_I2C_COMMAND_BYTE_TRANSFER | ((u8 *)data)[0];
536 reg_data[1] = ((u8 *)data)[1];
595 struct clk_cdce925_chip *data = _data;
598 if (idx >= ARRAY_SIZE(data->clk)) {
603 return &data->clk[idx].hw;
640 struct clk_cdce925_chip *data;
667 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
668 if (!data)
671 data->i2c_client = client;
672 data->chip_info = &clk_cdce925_chip_info_tbl[id->driver_data];
674 data->chip_info->num_plls * 0x10 - 1;
675 data->regmap = devm_regmap_init(&client->dev, ®map_cdce925_bus,
677 if (IS_ERR(data->regmap)) {
679 return PTR_ERR(data->regmap);
681 i2c_set_clientdata(client, data);
691 regmap_write(data->regmap,
694 regmap_update_bits(data->regmap, CDCE925_REG_GLOBAL1, BIT(4), 0);
697 regmap_update_bits(data->regmap, 0x02, BIT(7), 0);
705 for (i = 0; i < data->chip_info->num_plls; ++i) {
713 data->pll[i].chip = data;
714 data->pll[i].hw.init = &init;
715 data->pll[i].index = i;
716 err = devm_clk_hw_register(&client->dev, &data->pll[i].hw);
727 err = clk_set_rate(data->pll[i].hw.clk, value);
737 regmap_update_bits(data->regmap,
740 regmap_update_bits(data->regmap,
757 data->clk[0].chip = data;
758 data->clk[0].hw.init = &init;
759 data->clk[0].index = 0;
760 data->clk[0].pdiv = 1;
761 err = devm_clk_hw_register(&client->dev, &data->clk[0].hw);
772 for (i = 1; i < data->chip_info->num_outputs; ++i) {
779 data->clk[i].chip = data;
780 data->clk[i].hw.init = &init;
781 data->clk[i].index = i;
782 data->clk[i].pdiv = 1;
805 err = devm_clk_hw_register(&client->dev, &data->clk[i].hw);
815 data);
822 for (i = 0; i < data->chip_info->num_plls; ++i)